Datasheet > PXA270

PXA270

更新时间： 2024-11-13 22:26:07

品牌	Logo	应用领域
英特尔 - INTEL		机械
页数	文件大小	规格书
126页	1566K
描述
Electrical, Mechanical, and Thermal Specification

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数据手册

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PXA270 数据手册

Intel® PXA270 Processor

Electrical, Mechanical, and Thermal Specification

Data Sheet

High-performance processor:

Low power:

—Intel XScale® microarchitecture with

Intel® Wireless MMX™ Technology

—Wireless Intel Speedstep® Technology

—Less than 500 mW typical internal

dissipation

—7 Stage pipeline

—32 KB instruction cache

—32 KB data cache

—Supply voltage may be reduced to

0.85 V

—Four low-power modes

—2 KB “mini” data cache

—Extensive data buffering

—Dynamic voltage and frequency

management

256 Kbytes of internal SRAM for high

speed code or data storage preserved

during low-power states

High-speed baseband processor interface

(Mobile Scalable Link)

High-performance memory controller:

—Four banks of SDRAM: up to 104 MHz

@ 2.5V, 3.0V, and 3.3V I/O interface

—Six static chip selects

Rich serial peripheral set:

—AC’97 audio port

—Support for PCMCIA and Compact

Flash

—I²S audio port

—Companion chip interface

Flexible clocking:

—CPU clock from 104 to 624 MHz

—Flexible memory clock ratios

—Frequency changes

—USB Client controller

—USB Host controller

—USB On-The-Go controller

—Three high-speed UARTs (two with

hardware flow control)

—Functional clock gating

—FIR and SIR infrared communications

port

Additional peripherals for system

connectivity:

Hardware debug features — IEEE JTAG

interface with boundary scan

Hardware performance-monitoring

features with on-chip trace buffer

Real-time clock

Operating-system timers

LCD Controller

—SD Card / MMC Controller (with SPI

mode support)

—Memory Stick card controller

—Three SSP controllers

—Two I²C controllers

—Four pulse-width modulators (PWMs)

—Keypad interface with both direct and

matrix keys support

Universal Subscriber Identity Module

interface

—Most peripheral pins double as GPIOs

Order Number 280002-002

12 3 4 5 6 7...126

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