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PTN3300AHF2 PDF预览

PTN3300AHF2

更新时间： 2024-11-13 06:05:47
品牌 Logo 应用领域
恩智浦 - NXP 转换器电平转换器光电二极管
页数 文件大小 规格书
23页 125K
描述
DVI/HDMI level shifter with inverting 1.1 V HPD

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PTN3300AHF2 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：QFN包装说明：HVQCCN,
针数：488Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.8
商用集成电路类型：CONSUMER CIRCUITJESD-30 代码：S-PQCC-N48
JESD-609代码：e4长度：7 mm
湿度敏感等级：3功能数量：1
端子数量：48最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：HVQCCN封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度（摄氏度）：260
认证状态：Not Qualified座面最大高度：0.8 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：3 V
表面贴装：YES温度等级：INDUSTRIAL
端子面层：NICKEL PALLADIUM GOLD端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：40宽度：7 mm
Base Number Matches：1

PTN3300AHF2 数据手册

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PTN3300A  
DVI/HDMI level shifter with inverting 1.1 V HPD  
Rev. 01 — 30 June 2008  
Product data sheet  
1. General description  
The PTN3300A is a high-speed level shifter device which converts four lanes of low-swing  
AC-coupled differential input signals to DVI and HDMI compliant open-drain  
current-steering differential output signals, up to 2.25 Gbit/s per lane. Each of these lanes  
provides a level-shifting differential buffer to translate from low-swing AC-coupled  
differential signaling on the source side, to TMDS-type DC-coupled differential  
current-mode signaling terminated into 50 Ω to 3.3 V on the sink side. Additionally, the  
PTN3300A provides a single-ended active inverting buffer for voltage translation of the  
HPD signal from 5 V on the sink side to 1.1 V on the source side and provides a channel  
for level shifting of the DDC channel (consisting of a clock and a data line) between 3.3 V  
source-side and 5 V sink-side. The DDC channel is implemented using pass gate  
technology allowing level shifting as well as disablement (isolation between source and  
sink) of the clock and data lines.  
The low-swing AC-coupled differential input signals to the PTN3300A typically come from  
a display source with multi-mode I/O, which supports multiple display standards, e.g.,  
DisplayPort, HDMI and DVI. While the input differential signals are configured to carry DVI  
or HDMI coded data, they do not comply with the electrical requirements of the DVI v1.0  
specification or HDMI v1.3a specification. By using PTN3300A, chip set vendors are able  
to implement such reconfigurable I/Os on multi-mode display source devices, allowing the  
support of multiple display standards while keeping the number of chip set I/O pins low.  
See Figure 1.  
The PTN3300A main high-speed differential lanes feature low-swing self-biasing  
differential inputs which are compliant to the electrical specifications of DisplayPort  
Standard v1.1 and/or PCI Express Standard v1.1, and open-drain current-steering  
differential outputs compliant to DVI v1.0 and HDMI V1.3a electrical specifications. The  
PTN3300A also supports power-saving modes in order to minimize current consumption  
when no display is active or connected.  
The PTN3300A supports level translation functions and features supporting DVI and  
HDMI. It is identical to the PTN3300B except that the HPD_SOURCE_N output is the  
logic inverse function of input HPD_SINK, level shifted to 1.1 V. For a fully-featured  
HDMI/DVI level shifter function that supports active buffering of the DDC lines and HDMI  
dongle detect, the PTN3301 should be used.  
PTN3300A is powered from a single 3.3 V power supply consuming a small amount of  
power (120 mW typ.) and is offered in two different 48-terminal HWQFN packages, one  
laminate based (no terminals visible from edge of the package), and one leadframe-based  
(terminals visible from edge of the package).  
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PTN3300AHF2 替代型号

型号 品牌 替代类型 描述 数据表
PTN3360ABS NXP

功能相似

 Enhanced performance HDMI/DVI level shifter with inverting HPD

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