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PO74G16245B PDF预览

PO74G16245B

更新时间: 2024-11-15 06:04:35
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POTATO /
页数 文件大小 规格书
7页 643K
描述
1.2v-3.6v, 16-bit Bidirectional Transceiver with 3 state outputs

PO74G16245B 数据手册

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PO74G16245B  
1.2v-3.6v, 16-bit Bidirectional Transceiver with 3 state outputs  
12/18/08  
74 Series GHz Logic  
FEATURES:  
DESCRIPTION:  
. Patented technology  
Potato Semiconductor’s PO74G16245B is designed for  
world top performance using submicron CMOS  
technology to achieve 1GHz TTL /CMOS output  
frequency with less than 1.65ns propagation delay.  
This Octal bus buffer gate is designed for 1.2-V to  
3.6-V VCC operation.  
. Operating frequency up to 1GHz with 2pf load  
. Operating frequency up to 730MHz with 5pf load  
. Operating frequency up to 320MHz with 15pf load  
. Operating frequency up to 75MHz with 50pf load  
The PO74G16245B features independent 16-bit  
Bidirectional Transceiver with 3 state outputs. Each  
output is disabled when the associated output-  
enable(OE) input is high.  
. VCC Operates from 1.2V to 3.6V  
. Propagation delay < 1.65ns max with 15pf load  
. Low input capacitance: 5pf typical  
. Available in 48pin TSSOP package  
Pin Configuration  
Logic Block Diagram  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1OE  
1A0  
1A1  
GND  
1A2  
1A3  
VCC  
1A4  
1A5  
GND  
1A6  
1A7  
2A0  
2A1  
GND  
2B2  
2A3  
VCC  
2A4  
2A5  
GND  
2A6  
2A7  
2OE  
1DIR  
1B0  
1B1  
GND  
1B2  
1B3  
VCC  
1B4  
1B5  
GND  
1B6  
1B7  
2B0  
2B1  
GND  
2B2  
2B3  
VCC  
2B4  
2B5  
GND  
2B6  
2B7  
2DIR  
2
1DIR  
2DIR  
3
1OE  
2OE  
4
1A0  
1A1  
1A2  
1A3  
1A4  
1A5  
1A6  
1A7  
2A0  
2A1  
2A2  
2A3  
2A4  
2A5  
2A6  
2A7  
5
6
1B0  
1B1  
1B2  
1B3  
1B4  
1B5  
1B6  
1B7  
2B0  
2B1  
2B2  
2B3  
2B4  
2B5  
2B6  
2B7  
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Pin Description  
Truth Table  
Pin Name  
Description  
Inputs  
Outputs  
xOE  
3-State Output Enable Inputs (Active LOW)  
Direction Control Input  
Side A Inputs or 3-State Inputs  
Side B Outputs or 3-State Outputs  
Ground  
xOE  
L
xDIR  
xDIR  
L
H
X
Bus B Data to Bus A  
Bus A Data to Bus B  
Z
XAX  
L
XBX  
H
GND  
VCC  
Power  
1
Copyright © Potato Semiconductor Corporation  

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