Nexperia
PIMC32
50 V, 500 mA NPN/PNP Resistor-Equipped double Transistor (RET); R1 = 2.2 kΩ, R2 = 10 kΩ
006aab531
500
P
tot
(mW)
400
300
200
100
0
- 75
- 25
25
75
125
175
(°C)
T
amb
FR4 PCB, single-sided, 35 µm copper, tin-plated and standard footprint
Fig. 1. Per device: Power derating curve
9. Thermal characteristics
Table 6. Thermal characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Per transistor
Rth(j-a)
thermal resistance from in free air
junction to ambient
[1]
-
-
-
-
432
105
K/W
K/W
Rth(j-sp)
thermal resistance from
junction to solder point
Per device
Rth(j-a)
thermal resistance from in free air
junction to ambient
[1]
-
-
298
K/W
[1] Device mounted on an FR4 PCB, single-sided, 35 µm copper, tin-plated and standard footprint.
006aaa494
3
10
δ = 1
Z
th(j-a)
0.75
0.33
(K/W)
0.50
2
10
0.20
0.10
0.05
0.02
0.01
10
0
1
10
- 5
- 4
- 3
- 2
- 1
2
3
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, single-sided, 35µm copper, tin-plated and standard footprint
Fig. 2. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
©
PIMC32
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
16 February 2022
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