Datasheet > PIMC32

PIMC32

更新时间： 2023-09-03 20:36:31

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
14页	293K
描述
50 V, 500 mA NPN/PNP Resistor-Equipped double Transistor (RET); R1 = 2.2 kΩ, R2 = 10 kΩProduction

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获取价格

数据手册

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PIMC32 数据手册

Nexperia

PIMC32

50 V, 500 mA NPN/PNP Resistor-Equipped double Transistor (RET); R1 = 2.2 kΩ, R2 = 10 kΩ

5. Pinning information

Table 2. Pinning information

Symbol

GND1

Description

Simplified outline

Graphic symbol

O1 I2

GND2

TR2

GND (emitter) TR1

input (base) TR1

output (collector) TR2

GND (emitter) TR2

input (base) TR2

output (collector) TR1

GND2

TR1

SC-74; TSOP6 (SOT457)

GND1

I1 O2

aaa-007379

6. Ordering information

Table 3. Ordering information

Type number

Package

Name

Description

Version

SOT457

PIMC32

SC-74; TSOP6 plastic, surface-mounted package (SC-74; TSOP6); 6

leads

7. Marking

Table 4. Marking codes

Type number

Marking code

PIMC32

8. Limiting values

Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions

Per transistor; for the PNP transistor (TR2) with negative polarity where applicable

Min

Max

Unit

V_CBO

V_CEO

V_EBO

V_I

collector-base voltage

open emitter

collector-emitter voltage open base

emitter-base voltage

input voltage

open collector

-5

500

290

I_O

output current

P_tot

total power dissipation

T_amb≤ 25 °C

[1]

Per device

P_tot

total power dissipation

junction temperature

ambient temperature

storage temperature

420

150

°C

T_j

T_amb

T_stg

-55

-65

°C

[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided, 35 µm copper, tin-plated and standard footprint.

PIMC32

All information provided in this document is subject to legal disclaimers.

Product data sheet

16 February 2022

2 / 14

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