PIC17CXX
EPROM Memory Programming Specification
This document includes the programming
specifications for the following devices:
Pin Diagram
40L PDIP, Windowed CERDIP
• PIC17C42
• PIC17C42A
• PIC17CR42
• PIC17C43
• PIC17CR43
• PIC17C44
VDD
RC0/AD0
RC1/AD1
RC2/AD2
RC3/AD3
RC4/AD4
RC5/AD5
RC6/AD6
RC7/AD7
VSS
1
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
RD0/AD8
RD1/AD9
RD2/AD10
RD3/AD11
RD4/AD12
RD5/AD13
RD6/AD14
RD7/AD15
MCLR/VPP
VSS
2
3
1.0
PROGRAMMING THE PIC17CXX
4
5
The PIC17CXX is programmed using the TABLWT
instruction. The table pointer points to the internal
EPROM location start. Therefore, a user can program
an EPROM location while executing code (even from
internal EPROM). This programming specification
applies to PIC17CXX devices in all packages.
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
RB0/CAP1
RB1/CAP2
RB2/PWM1
RB3/PWM2
RB4/TCLK12
RB5/TCLK3
RB6
RE0/ALE
RE1/OE
For the convenience of a programmer developer, a
“program & verify” routine is provided in the on-chip test
program memory space, the program resides in ROM
and not EPROM. Therefore, it is not erasable. The
“program/verify” routine allows the user to load any
address, program a location, verify a location or incre-
ment to the next location. It allows variable program-
ming pulse width.
RE2/WR
TEST
RA0/INT
RA1/T0CKI
RA2
RB7
RA3
OSC1/CLKIN
OSC2/CLKOUT
RA4/RX/DT
RA5/TX/CK
1.1
Hardware Requirements
The PIC17CXX requires two programmable power
supplies, one for VDD (2.5V to 6.0V recommended) and
one for VPP (13 ± 0.25V). Both supplies should have a
minimum resolution of 0.25V.
Since the PIC17CXX under programming is actually
executing code from “boot ROM,” a clock must be pro-
vided to the part. Furthermore, the PIC17CXX under
programming may have any oscillator configuration
(EC, XT, LF or RC). Therefore, the external clock driver
must be able to overdrive pulldown in RC mode. CMOS
drivers are required since the OSC1 input has a
Schmitt trigger input with levels (typically) of 0.2VDD
and 0.8VDD. See the PIC17C4X data sheet
(DS30412A) for exact specifications.
The PIC17CXX uses an intelligent algorithm. The algo-
rithm calls for program verification at VDDmin as well as
VDDmax. Verification at VDDmin guarantees good
“erase margin”. Verification at VDDmax guarantees
good “program margin”. Three times (3X) additional
pulses will increase program margin then beyond VDD
(max.) and insure safe operation in user system.
PIN DESCRIPTIONS (DURING PROGRAMMING): PIC17C42/42A/43/44
During Programming
Pin Name
Pin Name
Pin Type
Pin Description
RA <0:4>
TEST
RA <0:4>
TEST
I
I
Necessary in programming mode
Must be set to “high” to enter programming mode
Address & data: high byte
Address & data: low byte
Programming Power
RB <7:0>
RC <7:0>
MCLR/VPP
VDD
PAD <15:8>
PAD <7:0>
VPP
I/O
I/O
P
VDD
P
Power Supply
VSS
VSS
P
Ground
Legend: I = Input, O = Output, P = Power
1996 Microchip Technology Inc.
DS30139I-page 1
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