PI6C3991JIE

更新时间： 2024-11-18 13:12:19

品牌	Logo	应用领域
百利通 - PERICOM		时钟
页数	文件大小	规格书
11页	502K
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中文翻译

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数据手册

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PI6C3991JIE 数据手册

PI6C3991

3.3V High-Speed, Low-Voltage

Programmable Skew Clock Buffer

SuperClock

Features

Description

All output pair skew <100ps typical (250 Max.)

3.75 MHz to 80 MHz output operation

User-selectable output functions

Selectable skew to 18ns

PI6C3991 offers selectable control over system clock functions.

These multiple-output clock drivers provide the system integrator

with functions necessary to optimize the timing of high-perfor-

mancecomputersystems.Eightindividualdrivers,arrangedasfour

pairs of user-controllable outputs, can each drive terminated trans-

mission lines with impedances as low as 50 ohms while delivering

minimal and specified output skews and full-swing logic levels

(LVTTL).

Inverted and Non-Inverted

Operation at ½ and ¼ input frequency

Operation at 2X and 4X input frequency

(input as low as 3.75 MHz, x4 operation)

Each output can be hardwired to one of nine skews or function

configurations. Delay increments of 0.7ns to 1.5ns are determined

by the operating frequency with outputs able to skew up to ±6 time

units from their nominal zero skew position. The completely

integrated PLL allows external load and transmission line delay

effects to be canceled. The user can create output-to-output skew

up to ±12 time units.

Zero input-to-output delay

50% duty-cycle outputs

LVTTLoutputsdrive50-ohmterminatedlines

Operates from a single 3.3V supply

Low operating current

Divide-by-two and divide-by-four output functions are provided

foradditionalflexibilityindesigningcomplexclocksystems.When

combined with the internal PLL, these divide functions allow

distribution of a low-frequency clock that can be multiplied by

two or four at the clock destination. This feature allows flexibility

and simplifies system timing distribution design for complex

high-speed systems.

Availablein32-pinPLCC(J)package

Jitter < 200ps peak-to-peak (< 25ps RMS)

PinConfiguration

LogicBlockDiagram

Test

Phase

Freq.

DET

VCO and

Time Unit

Generator

Filter

REF

32 31 30

3F1

4F0

4F1

2F0

GND

1F1

1F0

4Q0

4Q1

4F0

4F1

CCQ

32-Pin

Select Inputs

(three level)

CCN

4Q1

CCN

Skew

3Q0

3Q1

1Q0

1Q1

GND

3F0

3F1

4Q0

Select

GND

2Q0

2Q1

2F0

2F1

Matrix

14 15 16 17 18 19 20

1Q0

1Q1

1F0

1F1

PS8450B

04/09/01

12 3 4 5 6 7...11

中文翻译

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与PI6C3991JIE相关器件

型号	品牌	获取价格	描述	数据表
PI6C3993-5AC	PERICOM	获取价格	PLL Based Clock Driver, 16 True Output(s), 0 Inverted Output(s), PQFP100, PLASTIC, TQFP-10
PI6C39X0202	DIODES	获取价格	Low skew 2-output CMOS clock buffer
PI6C39X020401	DIODES	获取价格	Low skew 4-output CMOS clock buffer
PI6C3Q991	PERICOM	获取价格	3.3V Programmable Skew PLL Clock Driver
PI6C3Q991-2	ETC	获取价格	Eight Distributed-Output Clock Driver
PI6C3Q991-2J	PERICOM	获取价格	3.3V Programmable Skew PLL Clock Driver
PI6C3Q991-2JE	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 4 True Output(s), 0 Inverted Output(s), PQCC32, PLASTIC
PI6C3Q991-2JEX	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 4 True Output(s), 0 Inverted Output(s), PQCC32, PLASTIC
PI6C3Q991-2JX	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 4 True Output(s), 0 Inverted Output(s), PQCC32, PLASTIC
PI6C3Q991-5	ETC	获取价格	Clock IC \| 500ps Accuracy. 3.3V. Balanced. 3.75 to 85 MHz

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