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PI6C3Q991A-5IJ PDF预览

PI6C3Q991A-5IJ

更新时间: 2024-09-30 16:47:55
品牌 Logo 应用领域
百利通 - PERICOM 驱动逻辑集成电路
页数 文件大小 规格书
10页 278K
描述
PLL Based Clock Driver, 6C Series, 8 True Output(s), 0 Inverted Output(s), PQCC32, PLASTIC, LCC-32

PI6C3Q991A-5IJ 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFJ
包装说明:QCCJ, LDCC32,.5X.6针数:32
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.83
系列:6C输入调节:STANDARD
JESD-30 代码:R-PQCC-J32JESD-609代码:e0
长度:13.97 mm逻辑集成电路类型:PLL BASED CLOCK DRIVER
最大I(ol):0.012 A功能数量:1
反相输出次数:端子数量:32
实输出次数:8最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC32,.5X.6
封装形状:RECTANGULAR封装形式:CHIP CARRIER
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
Prop。Delay @ Nom-Sup:0.5 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.7 ns座面最大高度:3.55 mm
子类别:Clock Drivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:11.43 mm
最小 fmax:110 MHzBase Number Matches:1

PI6C3Q991A-5IJ 数据手册

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PI6C3Q991A, PI6C3Q993A  
3.3V Programmable Skew PLL Clock Driver  
SuperClock  
Features  
Description  
• PI6C3Q99X family provides following products:  
PI6C3Q991A:32-pinPLCCversion  
PI6C3Q993A:28-pinQSOPversion  
• Inputs are 5V Tolerant  
ThePI6C3Q99Xfamily,ahigh-fanout3.3VPLL-basedclockdriver,  
isintendedforhigh-performancecomputinganddata-communica-  
tion applications. A key feature of the programmable skew is the  
abilityofoutputstoleadorlagtheREFinputsignal.ThePI6C3Q991A  
has 8 programmable skew outputs in 4 banks of 2, while the  
PI6C3Q993A has 6 programmable skew outputs and 2 zero skew  
outputs. Skew is controlled by 3-level input signals that may be  
hard-wiredtoappropriateHIGH-MID-LOWlevels.  
• 4 pairs of programmable skew outputs  
• Low skew: 200ps same pair; 250ps all outputs  
• Selectable positive or negative edge synchronization:  
Excellent for DSP applications  
• Synchronous output enable  
When the GND/sOE pin is held LOW, all the outputs are synchro-  
nously enabled. However, if GND/sOE is held HIGH, all outputs  
except 3Q0 and 3Q1 are synchronously disabled. Furthermore,  
• Input frequency: 3.75 MHz to 85 MHz  
• Output frequency: 15 MHz to 85MHz  
• 2x, 4x, 1/2, and 1/4 outputs  
whentheV  
/PEisheldHIGH,alloutputsaresynchronizedwith  
CCQ  
• 3 skew grades:  
the positive edge of the REF clock input. When V  
/PE is held  
CCQ  
PI6C3Q99x:tSKEW0<750ps  
LOW, all outputs are synchronized with the negative edge of REF.  
Both devices have LVTTL outputs with 12mA balanced drive  
outputs.  
PI6C3Q99x-5:tSKEW0<500ps  
PI6C3Q99x-2:tSKEW0<250ps  
• 3-level inputs for skew and PLL range control  
• PLL bypass for DC testing  
• Externalfeedback,internalloopfilter  
• 12mA balanced drive outputs  
• LowJitter:<200pspeak-to-peak  
• Industrial temperature range  
• Pin-to-pincompatiblewithIDTQS5V991AandQS5V993A  
• Availablein32-pinPLCCand28-pinQSOP  
PinConfigurations  
PI6C3Q991A  
PI6C3Q993A  
1
REF  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
GND  
TEST  
2F1  
2
V
CCQ  
FS  
3
4
3
2
1 32 31 30  
29  
4
3F0  
3F1  
/PE  
2F0  
3F1  
4F0  
4F1  
/PE  
5
6
7
8
9
2F0  
GND/sOE  
1F1  
5
GND/sOE  
1F1  
28  
27  
26  
25  
24  
23  
22  
21  
6
V
CCQ  
V
28-Pin  
Q
7
1F0  
V
CCN  
1F0  
CCQ  
V
32-Pin  
8
4Q1  
4Q0  
GND  
3Q1  
3Q0  
V
CCN  
V
CCN  
4Q1  
4Q0  
GND  
GND  
J
CCN  
9
1Q0  
1Q1  
GND  
GND  
2Q0  
2Q1  
10  
11  
12  
13  
1Q0  
1Q1  
GND  
GND  
10  
11  
12  
13  
14  
V
14 15 16 17 18 19 20  
CCN  
FB  
PS8628  
08/15/02  
1

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