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PI6C2409-1HLX PDF预览

PI6C2409-1HLX

更新时间: 2024-11-29 21:10:03
品牌 Logo 应用领域
百利通 - PERICOM 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
8页 261K
描述
PLL Based Clock Driver, 6C Series, 8 True Output(s), 0 Inverted Output(s), PDSO16, 0.173 INCH, MS-012AC, TSSOP-16

PI6C2409-1HLX 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:TSSOP,针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.57
系列:6C输入调节:STANDARD
JESD-30 代码:R-PDSO-G16长度:5 mm
逻辑集成电路类型:PLL BASED CLOCK DRIVER功能数量:1
反相输出次数:端子数量:16
实输出次数:8最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):0.35 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.25 ns
座面最大高度:1.2 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:COMMERCIAL
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mm最小 fmax:133 MHz
Base Number Matches:1

PI6C2409-1HLX 数据手册

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PI6C2409-1  
Zero-Delay Clock Buffer  
ProductFeatures  
FunctionalDescription  
Maximumratedfrequency:133MHz  
Lowcycle-to-cyclejitter  
Input to output delay, less than 200ps  
Internal feedback allows outputs to be synchronized to the  
clock input  
The PI6C2409-1 is a PLL based, zero-delay buffer, with the ability  
to distribute nine outputs of up to 133MHz at 3.3V.  
AlltheoutputsaredistributedfromasingleclockinputCLKINand  
outputOUT0performszerodelaybyconnectingafeedbacktoPLL.  
PI6C2409-1 has two banks of four outputs that can be controlled by  
theselectioninputs,SEL1&SEL2.Italsohasapowersparingfeature:  
when input SEL1 is 0 and SEL2 is 1, PLL is turned off and all  
outputs are referenced from CLKIN. PI6C2409-1 is available in  
high drive and industrial environment versions.  
Operatesat3.3VVDD  
Space-saving Packages: (Pb-free&Greenavailable)  
150-milSOIC (W)  
173-milTSSOP (L)  
An internal feedback on OUT0 is used to synchronize the  
outputs to the input; the relationship between loading of this signal  
and the outputs determines the input-output delay.  
PI6C2409-1 are characterized for both commercial and  
industrial operation  
BlockDiagram  
PinConfiguration  
OUT0  
CLKIN  
OUTA1  
OUTA2  
16  
15 OUTA4  
1
2
3
4
5
6
7
8
OUT0  
PLL  
OUTA1  
OUTA2  
OUTA3  
OUTA4  
MUX  
CLKIN  
16-Pin 14  
OUTA3  
W, L  
13  
12  
11  
10  
9
V
V
GND  
OUTB4  
OUTB3  
SEL1  
DD  
DD  
GND  
OUTB1  
OUTB2  
SEL2  
SEL1  
SEL2  
Decode  
Logic  
OUTB1  
OUTB2  
OUTB3  
OUTB4  
PI6C2409(-1, -1H)  
PS8613C  
02/08/06  
06-0191  
1

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PLL Based Clock Driver, 6C Series, 8 True Output(s), 0 Inverted Output(s), PDSO16, 0.150 I