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PI6C2409-1HLEX PDF预览

PI6C2409-1HLEX

更新时间: 2024-11-29 20:33:27
品牌 Logo 应用领域
美台 - DIODES 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
8页 948K
描述
Clock Driver, 6C Series, 9 True Output(s), 0 Inverted Output(s), PDSO16, TSSOP-16

PI6C2409-1HLEX 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:TSSOP, TSSOP16,.25Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.57系列:6C
输入调节:STANDARDJESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:5 mm
逻辑集成电路类型:CLOCK DRIVER最大I(ol):0.012 A
湿度敏感等级:1功能数量:1
反相输出次数:端子数量:16
实输出次数:9最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:3.3 V传播延迟(tpd):0.35 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.25 ns
座面最大高度:1.2 mm子类别:Clock Drivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:COMMERCIAL端子面层:MATTE TIN (787)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:4.4 mm最小 fmax:133 MHz
Base Number Matches:1

PI6C2409-1HLEX 数据手册

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PI6C2409-1H  
Zero-Delay Clock Buffer  
Features  
Description  
•ꢀ Maximumꢀratedꢀfrequency:ꢀ133ꢀMHz  
•ꢀ Lowꢀcycle-to-cycleꢀjitter  
•ꢀ Inputꢀtoꢀoutputꢀdelay,ꢀlessꢀthanꢀ200ps  
ThePI6C2409-1HisaPLLbased,zero-delaybuffer,withtheabilityꢀ  
toꢀ distributeꢀ nineꢀ outputsꢀ ofꢀ upꢀ toꢀ 133ꢀ MHzꢀ atꢀ 3.3V.ꢀ  
AlltheoutputsaredistributedfromasingleclockinputCLKINandꢀ  
outputOUT0performszerodelaybyconnectingafeedbacktoPLL.  
•ꢀ Internalꢀfeedbackꢀallowsꢀoutputsꢀtoꢀbeꢀsynchronizedꢀtoꢀtheꢀ  
clockꢀinput  
PI6C2409-1Hhastwobanksoffouroutputsthatcanbecontrolledbyꢀ  
theselectioninputs,SEL1&SEL2.Italsohasapowersparingfeature:ꢀ  
whenꢀinputꢀSEL1ꢀisꢀ0ꢀandꢀSEL2ꢀisꢀ1,ꢀPLLꢀisꢀturnedꢀoffꢀandꢀallꢀ  
outputsꢀareꢀreferencedꢀfromꢀCLKIN.ꢀPI6C2409-1Hꢀisꢀavailableꢀinꢀ  
highꢀdriveꢀandꢀindustrialꢀenvironmentꢀversions.  
•ꢀ Spreadꢀspectrumꢀcompatible  
•ꢀ Operatesꢀatꢀ3.3VꢀV  
DD  
•ꢀ Space-savingꢀPackage:ꢀ(Pb-freeꢀ&ꢀGreenꢀavailable)ꢀ  
-ꢀ16-PinꢀTSSOPꢀꢀ(L)  
-ꢀ16-PinꢀSOICꢀꢀ(W)ꢀ  
Anꢀ internalꢀ feedbackꢀ onꢀ OUT0ꢀ isꢀ usedꢀ toꢀ synchronizeꢀ theꢀ  
outputsꢀtoꢀtheꢀinput;ꢀtheꢀrelationshipꢀbetweenꢀloadingꢀꢀofꢀthisꢀsignalꢀ  
andꢀ theꢀ outputsꢀ determinesꢀ theꢀ input-outputꢀ delay.ꢀ  
PI6C2409-1Hꢀ areꢀ characterizedꢀ forꢀ bothꢀ commercialꢀ andꢀ  
industrialꢀoperation  
Block Diagram  
Pin Configuration  
OUT0  
16  
15 OUTA4  
CLKIN  
OUTA1  
OUTA2  
1
2
3
OUT0  
PLL  
OUTA1  
OUTA2  
OUTA3  
OUTA4  
MUX  
CLKIN  
14  
13  
12  
11  
10  
9
OUTA3  
16-Pin  
W, L  
VDD 4  
GND 5  
V
GND  
DD  
SEL1  
SEL2  
Decode  
Logic  
OUTB1  
6
OUTB2 7  
SEL2 8  
OUTB4  
OUTB3  
SEL1  
OUTB1  
OUTB2  
OUTB3  
OUTB4  
PI6C2409-1H  
All trademarks are property of their respective owners.  
www.pericom.com  
12/02/15  
15-0174  
1

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