5秒后页面跳转
PI6C2408-3LE PDF预览

PI6C2408-3LE

更新时间: 2024-11-27 22:44:27
品牌 Logo 应用领域
百利通 - PERICOM 时钟驱动器逻辑集成电路光电二极管
页数 文件大小 规格书
10页 200K
描述
Zero-Delay Clock Buffer

PI6C2408-3LE 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:TSSOP, TSSOP16,.25针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.82
Is Samacsys:N系列:6C
输入调节:STANDARDJESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:5 mm
逻辑集成电路类型:PLL BASED CLOCK DRIVER最大I(ol):0.008 A
湿度敏感等级:1功能数量:1
反相输出次数:端子数量:16
实输出次数:8最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:0.15 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.4 ns
座面最大高度:1.2 mm子类别:Clock Drivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
最小 fmax:140 MHzBase Number Matches:1

PI6C2408-3LE 数据手册

 浏览型号PI6C2408-3LE的Datasheet PDF文件第2页浏览型号PI6C2408-3LE的Datasheet PDF文件第3页浏览型号PI6C2408-3LE的Datasheet PDF文件第4页浏览型号PI6C2408-3LE的Datasheet PDF文件第5页浏览型号PI6C2408-3LE的Datasheet PDF文件第6页浏览型号PI6C2408-3LE的Datasheet PDF文件第7页 
PI6C2408  
Zero-Delay Clock Buffer  
Features  
Maximumratedfrequency:140MHz  
Lowcycle-to-cyclejitter  
Input to output delay, less than 150ps  
External feedback pin allows outputs to be synchronized  
to the clock input  
5V tolerant input*  
Operatesat3.3VVDD  
Test mode allows bypass of the PLL for system testing  
purposes (e.g., IBIS measurements)  
Description  
The PI6C2408 is a PLL-based, zero-delay buffer, with the ability  
to distribute eight outputs of up to 140 MHz at 3.3 V. Two banks of  
four outputs exist, and, depending on product option ordered, can  
supply either reference frequency, prescaled half frequency, or  
multiplied2xor4xinputclockfrequencies. ThePI6C2408familyhas  
a power-sparing feature: when input SEL2 is 0, the component will  
3-state one or both banks of outputs depending on the state of input  
SEL1. A PLL bypass test mode also exists. This product line is  
available in high-drive and industrial environment versions.  
An external feedback pin is used to synchronize the outputs to the  
input; the relationship between loading of this signal and the other  
outputs determines the input-output delay.  
The PI6C2408 is characterized for both commercial and industrial  
operation.  
Clock frequency multipliers ½x to 4x dependent on option  
Packaging(Pb-freeandGreenavailable):  
-16-pin,150-milSOIC (W)  
-16-pin173-milTSSOP (L)  
* FB_IN and CLKIN must reference the same voltage thresh-  
olds for the PLL to deliver zero delay skewing  
BlockDiagram  
PinConfiguration  
FB_IN  
CLKIN  
÷2  
PLL  
OUTA1  
OUTA2  
OUTA3  
OUTA4  
MUX  
CLKIN  
OUTA1  
OUTA2  
16  
15 OUTA4  
1
2
3
4
5
6
7
8
FB_IN  
Option (-3, -4)  
14  
13  
12  
11  
10  
9
OUTA3  
SEL1  
SEL2  
Decode  
Logic  
16-Pin  
W,L  
V
V
GND  
DD  
DD  
GND  
OUTB1  
OUTB2  
SEL2  
÷2  
OUTB4  
OUTB3  
SEL1  
OUTB1  
OUTB2  
OUTB3  
OUTB4  
Option (-2, -3)  
PI6C2408 (-1, -1H, -2, -3, -4)  
FB_IN  
PLL  
OUTA1  
OUTA2  
OUTA3  
OUTA4  
MUX  
CLKIN  
SEL2  
SEL1  
Decode  
Logic  
÷2  
MUX  
PI6C2408-6  
OUTB1  
OUTB2  
OUTB3  
OUTB4  
PS8589E  
09/15/04  
1

与PI6C2408-3LE相关器件

型号 品牌 获取价格 描述 数据表
PI6C2408-3LEX PERICOM

获取价格

PLL Based Clock Driver, 6C Series, 8 True Output(s), 0 Inverted Output(s), PDSO16, 0.173 I
PI6C2408-3LI PERICOM

获取价格

PLL Based Clock Driver, 6C Series, 8 True Output(s), 0 Inverted Output(s), PDSO16, 0.173 I
PI6C2408-3LIX PERICOM

获取价格

PLL Based Clock Driver, 6C Series, 8 True Output(s), 0 Inverted Output(s), PDSO16, 0.173 I
PI6C2408-3LX PERICOM

获取价格

暂无描述
PI6C2408-3W PERICOM

获取价格

Zero-Delay Clock Buffer
PI6C2408-3WE PERICOM

获取价格

Zero-Delay Clock Buffer
PI6C2408-3WEX PERICOM

获取价格

PLL Based Clock Driver, 6C Series, 8 True Output(s), 0 Inverted Output(s), PDSO16, 0.150 I
PI6C2408-3WI PERICOM

获取价格

暂无描述
PI6C2408-3WIE PERICOM

获取价格

暂无描述
PI6C2408-3WIEX PERICOM

获取价格

暂无描述