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PI6C2405A-1HWIE PDF预览

PI6C2405A-1HWIE

更新时间: 2024-11-08 22:09:51
品牌 Logo 应用领域
百利通 - PERICOM 逻辑集成电路光电二极管驱动时钟
页数 文件大小 规格书
7页 442K
描述
Zero-Delay Clock Buffer

PI6C2405A-1HWIE 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:SOIC
包装说明:SOP, SOP8,.25针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:7.66
Is Samacsys:N系列:6C
输入调节:STANDARDJESD-30 代码:R-PDSO-G8
JESD-609代码:e3长度:4.9 mm
逻辑集成电路类型:PLL BASED CLOCK DRIVER最大I(ol):0.012 A
湿度敏感等级:1功能数量:1
反相输出次数:端子数量:8
实输出次数:5最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:3.3 V
传播延迟(tpd):0.3 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.2 ns座面最大高度:1.75 mm
子类别:Clock Drivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:3.9 mm
最小 fmax:133 MHzBase Number Matches:1

PI6C2405A-1HWIE 数据手册

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PI6C2405A  
Zero-Delay Clock Buffer  
Features  
Description  
Maximum rated frequency: 133 MHz  
Low cycle-to-cycle jitter  
Input to output delay, less than 300ps  
The PI6C2405Ais a PLL based, zero-delay buffer, with the ability  
to distribute five outputs of up to 133MHz at 3.3V. All the outputs  
are distributed from a single clock input CLKIN and output OUT0  
performs zero delay by connecting a feedback to PLL.  
Internal feedback allows outputs to be synchronized  
An internal feedback on OUT0 is used to synchronize the out-  
puts to the input; the relationship between loading of this signal  
and the outputs determines the input-output delay. PI6C2405A  
is able to track spread spectrum clocking for EMI reduction.  
PI6C2405A is characterized for both commercial and industrial  
operation.  
to the clock input  
5V tolerant input*  
Spread spectrum clock ready  
Operates at 3.3V V  
Packaging (Pb-free & Green available):  
-8-pin, 150-mil SOIC (W)  
DD  
PI6C2405A-1H is a high-drive version of PI6C2405A-1  
-8-pin, 173-mil TSSOP (L)  
* CLKIN must reference the same voltage thresholds for the PLL to  
deliver zero delay skewing  
Block Diagram  
Pin Configuration  
OUT  
1
0
8
7
6
5
CLKIN  
OUT  
OUT  
0
PLL  
CLKIN  
2
3
4
OUT  
OUT  
2
4
OUT  
OUT  
OUT  
OUT  
1
2
3
4
1
V
DD  
GND  
OUT  
3
PI6C2405A(–1, –1H)  
Pin Description  
Pin  
Signal  
Description  
1
CLKIN  
OUT[1-4]  
GND  
Input clock reference frequency (weak pull-down)  
2, 3, 5, 7  
Clock Outputs  
4
6
8
Ground  
V
3.3V Supply  
DD  
OUT0  
Clockoutput, internal PLL feedback (weak pull-down)  
PS8592D  
09/22/04  
1

PI6C2405A-1HWIE 替代型号

型号 品牌 替代类型 描述 数据表
PI6C2405A-1HWIEX PERICOM

完全替代

PLL Based Clock Driver, 6C Series, 5 True Output(s), 0 Inverted Output(s), PDSO8, 0.150 IN
PI49FCT32802LE PERICOM

功能相似

1:5/1:7 3.3V CMOS Clock Drivers

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PI6C2405A-1LE DIODES

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PI6C2405A-1LEX DIODES

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PI6C2405A-1LI PERICOM

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Zero-Delay Clock Buffer