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PI3V713-AZLE PDF预览

PI3V713-AZLE

更新时间: 2024-11-23 20:09:27
品牌 Logo 应用领域
美台 - DIODES /
页数 文件大小 规格书
8页 803K
描述
Video Multiplexer,

PI3V713-AZLE 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:,Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.57模拟集成电路 - 其他类型:VIDEO MULTIPLEXER
峰值回流温度(摄氏度):NOT SPECIFIED处于峰值回流温度下的最长时间:NOT SPECIFIED
Base Number Matches:1

PI3V713-AZLE 数据手册

 浏览型号PI3V713-AZLE的Datasheet PDF文件第2页浏览型号PI3V713-AZLE的Datasheet PDF文件第3页浏览型号PI3V713-AZLE的Datasheet PDF文件第4页浏览型号PI3V713-AZLE的Datasheet PDF文件第5页浏览型号PI3V713-AZLE的Datasheet PDF文件第6页浏览型号PI3V713-AZLE的Datasheet PDF文件第7页 
PI3V713-A  
3.3V, 7-Channel Analog Video Switch  
Features  
Description  
•ꢀ DesignedꢀspecificallyꢀtoꢀswitchꢀVGAꢀsignals  
•ꢀ 7-ChannelsꢀforꢀVGAꢀsignalsꢀ(R,G,B,ꢀHsync,ꢀVsync,ꢀDDCꢀ  
Data,ꢀandꢀDDCꢀCLK)  
Pericom’sꢀ PI3V713-Aꢀ isꢀ aꢀ 7-channelꢀ videoꢀ mux/demuxꢀ usedꢀ  
toꢀ switchꢀ betweenꢀ multipleꢀ VGAꢀ sourcesꢀ orꢀ endꢀ points.ꢀ ꢀ Inꢀ aꢀ  
notebookꢀapplicationꢀwhereꢀanalogꢀvideoꢀsignalsꢀareꢀfoundꢀinꢀbothꢀ  
theꢀnotebookꢀandꢀtheꢀdock,ꢀaꢀswitchꢀsolutionꢀisꢀrequiredꢀtoꢀswitchꢀ  
betweenthetwovideoportlocations.ꢀWiththehighbandwidthꢀ  
ofꢀꢀ~1.7GHz,ꢀtheꢀsignalꢀintegrityꢀwillꢀremainꢀstrongꢀevenꢀthroughꢀ  
theꢀlongꢀFR4ꢀtraceꢀbetweenꢀtheꢀnotebookꢀandꢀtheꢀdockingꢀstation.ꢀ  
Inꢀadditionꢀtoꢀhighꢀsignalꢀperformance,ꢀtheꢀvideoꢀsignalsꢀareꢀalsoꢀ  
•ꢀ V ꢀ=ꢀ3.3Vꢀ+/-10%  
DD  
•ꢀ DDCꢀpathꢀwillꢀoperateꢀasꢀaꢀ5Vꢀtoꢀ3.3Vꢀlevelꢀshifterꢀ  
•ꢀ H/Vꢀoutputꢀbufferꢀwithꢀ+/-24mAꢀdrive  
•ꢀ ESDꢀtoleranceꢀonꢀvideoꢀI/Oꢀpinsꢀisꢀupꢀtoꢀ12kVꢀHBMꢀperꢀ  
JEDECꢀstandard  
•ꢀ -3dBꢀBWꢀofꢀ1.7GHzꢀ(typ)ꢀ  
•ꢀ LowꢀXtalk,ꢀ(-38dBꢀtyp)  
protectedagainsthighESDwithintegrateddiodestoV ꢀandꢀ  
DD  
GNDꢀthatꢀwillꢀsupportꢀupꢀto12kVꢀHBMꢀESDꢀprotection.  
Application  
•ꢀ LowꢀandꢀFlatꢀON-STATEꢀresistanceꢀ(R ꢀ=ꢀ4.8-Ohm,ꢀ  
on  
RoutingꢀVGAꢀsignalsꢀwithꢀlowꢀsignalꢀattenuationꢀandꢀhighꢀESD.  
R (Flat)ꢀ=ꢀ0.5ohm,ꢀtyp)  
on  
•ꢀ Lowꢀinput/outputꢀcapacitanceꢀ(Conꢀ=ꢀ5.6pF,ꢀtyp)  
•ꢀ Packagingꢀ(Pb-freeꢀandꢀGreen):ꢀ  
–32-contactꢀTQFNꢀ(ZLE)ꢀ  
Applications  
•ꢀ Routesꢀphysicalꢀlayerꢀsignalsꢀforꢀhighꢀbandwidthꢀdigitalꢀvideo  
Block Diagram  
Pin Diagram  
R
G
B
R1  
G1  
B1  
32 31 30 29 28  
R2  
G2  
B2  
1
2
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
R
G
R1  
R2  
3
GND  
G1  
G2  
VDD  
B1  
+5V  
4
VDD  
B
H_SOURCE  
V_SOURCE  
H1_OUT  
V1_OUT  
5
Dual  
Buffer  
6
GND  
H_SOURCE  
V_SOURCE  
7
B2  
8
Reserved  
SDA_SOURCE  
SCL_SOURCE  
GND  
H1_OUT  
H2_OUT  
V1_OUT  
V2_OUT  
H2_OUT  
V2_OUT  
9
Dual  
Buffer  
10  
11  
Control  
Logic  
SEL  
12 13 14 15 16  
SDA1  
SCL1  
SDA2  
SCL2  
SDA_SOURCE  
SCL_SOURCE  
5V to 3.3V  
Level Shifter  
10-0192  
PS9101  
06/29/10  
1

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