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PI3VDP12412ZHE PDF预览

PI3VDP12412ZHE

更新时间: 2024-11-24 01:14:27
品牌 Logo 应用领域
百利通 - PERICOM /
页数 文件大小 规格书
12页 927K
描述
4-Lane DisplayPort Rev 1.2 Compliant Switch

PI3VDP12412ZHE 数据手册

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PI3VDP12412  
4-Lane DisplayPort™ Rev 1.2 Compliant Switch  
Description  
Features  
Î4-lane, 1:2 mux/demux that will support RBR, HBR1, or  
Pericom Semiconductor’s PI3VDP12412 mux/demux is targeted  
for next generation digital video signals. is device can be used  
to connect a DisplayPort™ Source to two Independent Display-  
Port Sinks or to connect two DisplayPort sources to a single DP  
display.  
HBR2  
Î1-channel 1:2 mux/demux for DP_HPD signal  
Î1-differential channel 1:2 mux/demux for DP_Aux signal  
with support up to 720Mbps  
PI3VDP12412 supports DisplayPort 1.2 which requires a data  
rate of 5.4 Gbps. PI3VDP12412 offers excellent signal integrity at  
this high data rate with very low insertion loss, good return loss,  
and very small crosstalk.  
Î-1.6dB Insertion Loss for Dx channels @ 2.7 GHz (TQFN)  
Î-3dB Bandwidth for Dx channels: 4.6GHz (TQFN)  
ÎReturn loss for Dx channels @ 2.7GHz: -16dB (TQFN)  
ÎLow Bit-to-Bit Skew , 5ps typ (between '+' and '-' bits)  
ÎLow Crosstalk for high speed channels: -28dB@5.4 Gbps  
PI3VDP12412 is available in two package types, a 5 mm x 5 mm  
48 BGA and a 3.5 mm x 9 mm 42 TQFN. e BGA consumes less  
board space. e TQFN achieves slightly better signal integrity.  
ÎLow Off Isolation for high speed channels: -22dB@5.4 Gbps  
Operating Range: 3.3V +/-10%  
ÎV  
DD  
ÎESD Tolerance: 2kV HBM  
Application  
ÎLow channel-to-channel skew, 35ps max  
ÎPackaging (Pb-free & Green):  
Routing of DisplayPort signals with low signal attenuation be-  
tween source and sink.  
à 42 TQFN (ZHE)  
à 48 BGA (NEE)  
Block Diagram  
D0+  
D0+A  
D0-A  
D1+A  
D1-A  
-
D0  
D1+  
-
D1  
D2+  
D2-  
D3+  
D3-  
D2+A  
D2-A  
D3+A  
D3-A  
D0+B  
D0-B  
D1+B  
D1-B  
D2+B  
D2-B  
D3+B  
D3-B  
AUX+  
AUX+ A  
AUX-A  
HPD A  
AUX  
-
HPD  
AUX+ B  
AUX- B  
HPD B  
SCL_A (BGA package only)  
SDA_A (BGA package only)  
SCL_B (BGA package only)  
SDA_B (BGA package only)  
GPU_SEL  
DDC_AUX_SEL (BGA package only)  
AUX_HPD_SEL (TQFN package only)  
Logic  
Control  
OE  
12/17/12  
1
12-0293  

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