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PI3VDP1431 PDF预览

PI3VDP1431

更新时间: 2024-11-24 14:53:59
品牌 Logo 应用领域
美台 - DIODES /
页数 文件大小 规格书
16页 791K
描述
Dual-mode DP 3.4Gbps Level Shifter/ReDriver

PI3VDP1431 数据手册

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COMPANY CONFIDENTIAL  
PI3VDP1431  
PI3VDP1413A  
Low Power Dual-mode DisplayPort 3.4Gb/s Level Shifer/Redriver  
Features  
Application  
ÎDual-mode DisplayPort level shifer/Redriver  
ÎNotebook and Desktop computers  
ÎOperation up to 3.4 Gbps per lane (340MHz pixel clock)  
Î4K Ultra HD, 3D video ꢀormats (1080p, 1080i, 720p), 48-bit  
per pixel Deep Color support  
Device Information  
ÎLow standby current with DDC passive Switch or Buffer  
Part Number  
PI3VDP1431  
PI3VDP1431A TQFN(32) 3x6mm DDC Buffer  
Package/Body Size Description  
TQFN(32) 3x6mm DDC Switch  
mode  
ÎFlexible 3 steps equalization control steps: 2.5, 5, 7.5 dB  
ÎPre-emphasis control 3 steps: 0, 1.5, 2.5 dB  
Note: Please reꢀer ordering addendum at the end oꢀ the datasheet  
ÎAutomatic output squelch and HPD ꢀunction ꢀor power  
saving states management at no input signal condition  
ÎConvert low-swing DC or AC coupled differential input  
ÎIntegrated DDC level shifer or DDC Buffer (A version)  
ÎSignal Input channels with pull-down termination resistor  
Î3.3V single power supply  
ÎPin-to-Pin compatible with PI3HDMI511/PI3HDX511A  
ÎIntegrated ESD protection on I/O pins. +4k/-8kV contact  
Î32-pin TQFN(ZLS32) 3x6mm package  
Pin Configuration  
Description  
PI3VDP1431 is a low power dual-mode DisplayPort Level  
Shifer with intergrated 3.4Gbps redriver to improve jitter  
perꢀormance. Input channels has as pull-down termination  
resistors(RT), optimized ꢀor displayport level shifer applica-  
tion.  
32 31 30 29 28  
1
2
3
4
5
SCL_SINK  
VDD  
27  
26  
25  
CEXT  
OUT_D2-  
OUT_D2+  
IN_D2-  
IN_D2+  
IN_D1-  
24 OUT_D1-  
For mobile platꢀorms, extended battery hours have been one  
oꢀ the most demanding ꢀeatures. is product supports output  
squelch and/or HPD detection ꢀor smart power management to  
extend battery liꢀe with < 1mA stand-by current.  
23  
OUT_D1+  
TQFN- 32  
3x6mm  
IN_D1+ 6  
22  
21  
20  
19  
18  
17  
VDD  
7
OUT_D0-  
OUT_D0+  
OUT_CLK-  
IN_D0-  
8
IN_D0+  
e device converts AC and DC coupled input signals to the  
compliant signals in the HDMI or dual-mode DisplayPort  
source systems. Programmable TMDS input signal equaliza-  
tion helps to solve the compliance jitter issues, creating in the  
non-standard HDMI source system with robust ESD/EOS  
protection.  
9
IN_CLK-  
10  
IN_CLK+  
OUT_CLK+  
EQ_S0  
HPD_SRC 11  
12 13 14 15 16  
All trademarks are property of their respective owners.  
www.pericom.com  
04/14/15  
1
15-0014  

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