Datasheet > PHP69NLT

PHP69NLT

更新时间： 2024-02-06 06:48:13

品牌	Logo	应用领域
其他 - ETC		晶体晶体管
页数	文件大小	规格书
10页	82K
描述
TrenchMOS transistor Logic level FET

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PHP69NLT 数据手册

Philips Semiconductors

Product specification

TrenchMOS transistor

Logic level FET

PHP69N03LT, PHB69N03LT, PHD69N03LT

FEATURES

SYMBOL

QUICK REFERENCE DATA

• ’Trench’ technology

• Very low on-state resistance

• Fast switching

• Stable off-state characteristics

• High thermal cycling performance

• Low thermal resistance

V_DSS= 25 V

I_D= 69 A

_DS(ON)≤ 14 mΩ (V_GS= 5 V)

R_DS(ON)≤ 12 mΩ (V_GS= 10 V)

GENERAL DESCRIPTION

N-channel enhancement mode logic level field-effect power transistor in a plastic envelope using ’trench’ technology.

The combination of very low on-state resistance and low switching losses make this device the optimum choice in high

speed computer motherboard d.c. to d.c. converters.

The PHP69N03LT is supplied in the SOT78 (TO220AB) conventional leaded package.

The PHB69N03LT is supplied in the SOT404 surface mounting package.

The PHD69N03LT is supplied in the SOT428 surface mounting package.

PINNING

SOT78 (TO220AB)

SOT404

SOT428

DESCRIPTION

tab

gate

drain¹

source

tab drain

1 2 3

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

V_DSS

V_DGR

V_GS

V_GSM

I_D

Drain-source voltage

Drain-gate voltage

Gate-source voltage

Pulsed gate-source voltage T_j≤ 150˚C

T_j= 25 ˚C to 175˚C

T_j= 25 ˚C to 175˚C; R_GS= 20 kΩ

± 15

± 20

˚C

Continuous drain current

T_mb= 25 ˚C; V_GS= 5 V

T_mb= 100 ˚C; V_GS= 5 V

T_mb= 25 ˚C

I_DM

P_D

T_j, T_stg

Pulsed drain current

Total power dissipation

Operating junction and

storage temperature

240

125

175

T_mb= 25 ˚C

- 55

1 It is not possible to make connection to pin 2 of the SOT428 or SOT404 packages.

June 1998

Rev 1.400

12 3 4 5 6 7...10

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