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PDM41028LA10SOITY PDF预览

PDM41028LA10SOITY

更新时间: 2024-10-29 06:00:07
品牌 Logo 应用领域
其他 - ETC /
页数 文件大小 规格书
8页 237K
描述
1 Megabit Static RAM 256K x 4-Bit

PDM41028LA10SOITY 数据手册

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PDM41028  
1 Megabit Static RAM  
256K x 4-Bit  
1
2
Description  
Features  
The PDM41028 is a high-performance CMOS static  
RAM organized as 262,144 x 4 bits. Writing to this  
device is accomplished when the write enable (WE)  
and the chip enable (CE) inputs are both LOW.  
Reading is accomplished when WE remains HIGH  
and CE and OE are both LOW.  
High speed access times  
Com’l: 10, 12 and 15 ns  
Ind’l: 12 and 15 ns  
Low power operation (typical)  
- PDM41028SA  
3
Active: 400 mW  
Standby: 150 mW  
- PDM41028LA  
Active: 350 mW  
Standby: 100 mW  
The PDM41028 operates from a single +5V power  
supply and all the inputs and outputs are fully TTL-  
compatible. The PDM41028 comes in two versions,  
the standard power version PDM41028SA and a low  
power version the PDM41028LA. The two versions  
are functionally the same and only differ in their  
power consumption.  
Single +5V (±10%) power supply  
TTL-compatible inputs and outputs  
Packages  
5
The PDM41028 is available in a 28-pin 300-mil SOJ,  
and a 28-pin 400-mil SOJ for surface mount  
applications.  
Plastic SOJ (300 mil) - TSO  
Plastic SOJ (400 mil) - SO  
6
Functional Block Diagram  
7
A0  
Decoder  
Memory  
8
Addresses  
Matrix  
A17  
• • • • •  
Column I/O  
9
I/O0  
I/O1  
I/O2  
I/O3  
Input  
Data  
Control  
10  
11  
12  
CE  
WE  
OE  
Rev. 2.2 - 4/29/98  
1

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