5秒后页面跳转
PDM34089S12QTY PDF预览

PDM34089S12QTY

更新时间: 2024-11-25 15:47:39
品牌 Logo 应用领域
IXYS 静态存储器
页数 文件大小 规格书
15页 291K
描述
SRAM

PDM34089S12QTY 技术参数

生命周期:Obsolete包装说明:,
Reach Compliance Code:compliant风险等级:5.84
Base Number Matches:1

PDM34089S12QTY 数据手册

 浏览型号PDM34089S12QTY的Datasheet PDF文件第2页浏览型号PDM34089S12QTY的Datasheet PDF文件第3页浏览型号PDM34089S12QTY的Datasheet PDF文件第4页浏览型号PDM34089S12QTY的Datasheet PDF文件第5页浏览型号PDM34089S12QTY的Datasheet PDF文件第6页浏览型号PDM34089S12QTY的Datasheet PDF文件第7页 
PRELIMINARY  
PDM34089  
3.3V 64K x 32 Fast CMOS  
Synchronous Static RAM  
with Burst Counter  
1
2
Description  
Features  
The PDM34089 is a 2,097,152 bit synchronous ran-  
dom access memory organized as 65,536 x 32 bits. It  
is designed with burst mode capability and interface  
controls to provide high-performance in second  
level cache designs for x86, Pentium, 680x0, and  
PowerPC microprocessors. Addresses, write data  
and all control signals except output enable are con-  
trolled through positive edge-triggered registers.  
Write cycles are self-timed and are also initiated by  
the rising edge of the clock. Controls are provided to  
allow burst reads and writes of up to four words in  
length. A 2-bit burst address counter controls the  
two least-significant bits of the address during burst  
reads and writes. The burst address counter selec-  
tively uses the 2-bit counting scheme required by the  
x86 and Pentium or 680x0 and PowerPC micropro-  
cessors as controlled by the mode pin. Individual  
write strobes provide byte write for the four 8-bit  
bytes of data. An asynchronous output enable sim-  
plifies interface to high-speed buses.  
Interfaces directly with the x86, Pentium™, 680X0  
and PowerPC™ processors  
Single 3.3V power supply  
Mode selectable for interleaved or linear burst:  
Interleaved for x86 and Pentium  
Linear for 680x0 and PowerPC  
Fast access times:  
9, 10, 12 and 15 ns  
High-density 64K x 32 architecture with burst  
address counter  
3
4
Fully registered inputs  
High-output drive: 30 pF at rated T  
A
5
Asynchronous output enable  
Self-timed write cycle  
Separate byte write enables and one global write  
enable  
Internal burst read/write address counter  
Internal registers for address, data, controls  
Burst mode selectable  
Sleep mode  
7
Packages:  
100-pin QFP - (Q)  
100-pin TQFP - (TQ)  
8
9
10  
11  
12  
TM  
i486, Pentium are trademarks of Intel Corp. PowerPC is a trademark of the International Business Machines Corporation.  
Rev 1.1 - 5/01/98  
1

与PDM34089S12QTY相关器件

型号 品牌 获取价格 描述 数据表
PDM34089SA12QTR IXYS

获取价格

SRAM
PDM-38-10G MERRIMAC

获取价格

0 POWER DIVIDER / COMBINER
PDM-38-10G CRANE

获取价格

2000MHz - 18000MHz RF/MICROWAVE SPLITTER AND COMBINER, 1.2dB INSERTION LOSS
PDM-39-9G MERRIMAC

获取价格

0 POWER DIVIDER /COMBINER
PDM-40-10 MERRIMAC

获取价格

0 POWER DIVIDERS / COMBINERS
PDM-40-100 MERRIMAC

获取价格

0 POWER DIVIDERS / COMBINERS
PDM-40-250 MERRIMAC

获取价格

0 POWER DIVIDERS / COMBINERS
PDM41024 ETC

获取价格

1 Megabit Static RAM 128K x 8-Bit
PDM41024L20L32 ETC

获取价格

x8 SRAM
PDM41024L20L32I ETC

获取价格

x8 SRAM