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PD63000UDR PDF预览

PD63000UDR

更新时间: 2024-11-21 14:35:15
品牌 Logo 应用领域
美高森美 - MICROSEMI 微控制器
页数 文件大小 规格书
4页 467K
描述
Microcontroller,

PD63000UDR 技术参数

生命周期:Obsolete包装说明:,
Reach Compliance Code:compliant风险等级:5.83
Base Number Matches:1

PD63000UDR 数据手册

 浏览型号PD63000UDR的Datasheet PDF文件第2页浏览型号PD63000UDR的Datasheet PDF文件第3页浏览型号PD63000UDR的Datasheet PDF文件第4页 
PD63000  
8-bit PoE Microcontroller Unit  
Source Control Drawing  
Description _________________  
System Connectivity __________  
PowerDsine’s™ Microcontroller Unit, PD63000, is a  
member of Motorola’s HCS08 Family of 8-bit  
microcontroller units (MCUs). This MCU uses the  
enhanced HCS08 core and is pre-programmed with a  
special proprietary application. It is used in  
conjunction with PowerDsine’s PD64012 PoE  
Manager in Ethernet switches and Midspans to allow  
next generation network devices to share power and  
data over the same cable, according to IEEE 802.3af.  
When used in conjunction with the PD63000, the  
PD64012 operates in Enhanced mode.  
In order to properly relate to the MCU in this  
document, a diagram of basic system connectivity is  
presented, hereafter. The various port groups are  
depicted along with their respective port lines. This  
block diagram can be compared with the application  
schematics from PowerDsine’s Application Notes and  
Data Sheets, so as to understand the circuits used.  
V
V
REFH  
DDAD  
MC9S08GBxx  
C
BYAD  
0.1uF  
PTA0/KBIP0  
PTA1/KBIP1  
PTA2/KBIP2  
V
SSAD  
SYSTEM  
POWER  
V
V
DD  
REFL  
PORT  
A
PTA3/KBIP3  
PTA4/KBIP4  
PTA5/KBIP5  
PTA6/KBIP6  
PTA7/KBIP7  
V
DD  
SS  
C
BLK  
10uF  
C
BY  
0.1uF  
3V  
The MCU features a 1 Mb/s SPI to each of the PoE  
Managers and a communication interface with the  
host CPU via UART or I2C protocol. The I/O lines, the  
SPI bus and the control signals are loaded by 50-  
ohm serial resistors. The MCU runs at about 10 MHz,  
providing a 1 MHz clock frequency to the SPI bus. An  
external resonator is used for clock generation.  
V
PTB0/AD0  
R
R
S
F
PTB1/AD1  
PTB2/AD2  
XTAL  
X1  
PORT  
B
PTB3/AD3  
C1  
C2  
PTB4/AD4  
PTB5/AD5  
PTB6/AD6  
PTB7/AD7  
EXTAL  
BACKGROUND HEADER  
I/0 AND  
PERIPHERAL  
INTERFACE TO  
APPLICATION  
SYSTEM  
V
DD  
1
BKGD/MS  
PTC0/TxD2  
PTC1/RxD2  
PTC2/SDA  
PORT  
C
PTC3/SCL  
PTC4  
RESET  
IRQ  
OPTIONAL  
MANUAL  
RESET  
The device is a Motorola’s MC9S08GB60CFU  
microprocessor control unit – this is an 8-bit device  
composed of standard on-chip peripherals including:  
an 8-bit CPU, a 60-kbyte flash EEPROM, a 4-kbyte  
RAM, an asynchronous serial communications  
interface, a serial peripheral interface, a 3-channel  
timer and a 5-channel timer. In addition this chip  
includes: an 10-bit analog-to-digital converter.  
PTC5  
PTC6  
ASYNC INTERRUPT  
INPUT  
PTC7  
PTG0/BKDG/MS  
PTG1/XTAL  
PTG2/EXTAL  
PTD0/TPM1CH0  
PTD1/TPM1CH1  
PTD2/TPM1CH2  
PORT  
D
PORT  
G
PTG3  
PTG4  
PTD3/TPM2CH0  
PTD4/TPM2CH1  
PTD5/TPM2CH2  
PTD6/TPM2CH3  
PTG5  
PTG6  
PTG7  
PTD7/TPM2CH4  
PTF0  
PTF1  
PTF2  
PTE0/TxD1  
PTE1/RxD1  
PORT  
F
PTE2/SS  
PTE3/MISO  
PTE4/MOSI  
PTE5/SPSCK  
PTE6  
PTF3  
PORT  
E
PTF4  
PTF5  
PTF6  
PTF7  
PTE7  
Pin Configuration _____________  
Program Burn-in ______________  
Initial burn-in is accomplished via the background  
header (BDM), by PowerDsine. Thereafter the MCU  
is downloaded with a special Powerdsine program  
referred to as the PD64012 Enhanced Mode  
Software. This software can be downloaded via the  
UART port (pins 14 & 15, PTE0/TxD1 & PTE1/RxD1)  
or via the I2C port (pins 5 & 6, SDA & SCL.).  
64  
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49  
1
48 PTA2/KBIP2  
PTA1/KBIP1  
PTA0/KBIP0  
PTF7  
RESET  
PTG7  
47  
46  
2
PTC0/TxD2  
PTC1/RxD2  
3
4
45  
PTF6  
PTC2/SDA  
PTC3/SCL  
PTC4  
44  
43  
42  
5
6
PTF5  
V
7
REFL  
41  
V
REFH  
PTC5  
8
9
40  
39  
38  
PTB7/AD7  
PTB6/AD6  
PTC6  
Applicable Documents ________  
10  
PTC7  
PTF2  
PTF3  
ƒ IEEE 802.3af-2003 standard, DTE Power via MDI  
ƒ PowerDsine PD64012 Data Sheet, Cat. No. 06-0003-058  
ƒ Serial Communication Protocol, Cat. No. 06-0032-056  
ƒ PowerDsine Application Note 129 for Designing a  
48-port Enhanced PoE System  
11  
12  
PTB5/AD5  
PTB4/AD4  
37  
36  
35  
34  
13  
PTB3/AD3  
PTB2/AD2  
PTF4  
PTE0/TxD1  
PTE1/RxD1  
14  
15  
PTB1/AD1  
IRQ 16  
33 PTB0/AD0  
18 19 20 21 22 23 24 25 26 27 28 29 30 31  
17  
32  
ƒ MC9S08GB/GT Data sheet (V1.5) 8-/16-Bit  
Products Division, Motorola, Inc.  
Obtain from: http://e-  
www.motorola.com/files/microcontrollers/doc/data_sheet/MC9S0  
8GB60.pdf  
PowerDsine  
The Power over Ethernet Pioneers  
This document contains information that is proprietary to PowerDsine. As such, it is confidential and its disclosure is strictly prohibited by applicable law. If you and/or your company and PowerDsine  
have executed a Non-Disclosure Agreement, then this document is being provided in connection with the Agreement, and the information contained herein is covered by the Agreement and under its  
terms may not be disclosed or used and must be protected by you and/or your company.  

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