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PCS3I623Z05AG-08-TT PDF预览

PCS3I623Z05AG-08-TT

更新时间: 2024-11-21 08:24:19
品牌 Logo 应用领域
安森美 - ONSEMI PCS驱动光电二极管过程控制系统输出元件逻辑集成电路
页数 文件大小 规格书
13页 167K
描述
IC,CLOCK DRIVER,1:4 OUTPUT,TSSOP,8PIN,PLASTIC

PCS3I623Z05AG-08-TT 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:TSSOP-8Reach Compliance Code:compliant
风险等级:5.81系列:PCS3
JESD-30 代码:R-PDSO-G8长度:4.4 mm
负载电容(CL):30 pF逻辑集成电路类型:LOW SKEW CLOCK DRIVER
最大I(ol):0.008 A湿度敏感等级:1
功能数量:1反相输出次数:
端子数量:8实输出次数:4
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TUBE电源:3.3 V
最大电源电流(ICC):27 mAProp。Delay @ Nom-Sup:0.35 ns
传播延迟(tpd):0.35 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.7 ns座面最大高度:1.2 mm
子类别:Clock Drivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL宽度:3 mm
最小 fmax:50 MHzBase Number Matches:1

PCS3I623Z05AG-08-TT 数据手册

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PCS3P623Z05A,  
PCS3P623Z05B,  
PCS3P623Z09A,  
PCS3P623Z09B  
Product Preview  
http://onsemi.com  
TIMINGꢀSAFEt Peak EMI  
Reduction IC  
Description  
PCS3P623Z05/09 is a versatile, 3.3 V Zerodelay buffer designed  
to distribute TimingSafe clocks with Peak EMI reduction.  
PCS3P623Z05 is an eightpin version, accepts one reference input  
and drives out five lowskew TimingSafe clocks. PCS3P623Z09  
accepts one reference input and drives out nine lowskew  
TimingSafe clocks.  
TSSOP8  
T SUFFIX  
CASE 948AL  
SOIC8  
S SUFFIX  
CASE 751BD  
PCS3P623Z05/09 has a DLY_CTRL for adjusting the InputOutput  
clock delay, depending upon the value of capacitor connected at this  
pin to GND.  
PCS3P623Z05/09 operates from a 3.3 V supply and is available in  
two different packages, as shown in the ordering information table,  
over commercial and Industrial temperature range.  
TSSOP16  
T SUFFIX  
CASE 948AN  
SOIC16  
S SUFFIX  
CASE 751BG  
Application  
PCS3P623Z05/09 is targeted for use in Displays and memory  
interface systems.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 13 of this data sheet.  
Features  
Clock Distribution with TimingSafe Peak EMI Reduction  
Input Frequency Range: 20 MHz 50 MHz  
Multiple Low Skew TimingSafe Outputs:  
PCS3P623Z05: 5 Outputs  
PCS3P623Z09: 9 Outputs  
External InputOutput Delay Control Option  
Supply Voltage: 3.3 V 0.3 V  
Commercial and Industrial Temperature Range  
Packaging Information:  
ASM3P623Z05: 8 pin SOIC, and TSSOP  
ASM3P623Z09: 16 pin SOIC, and TSSOP  
True Dropin Solution for Zero Delay Buffer, ASM5P2305A / 09A  
These Devices are PbFree, Halogen Free/BFR Free and are RoHS  
Compliant  
This document contains information on a product under development. ON Semiconductor  
reserves the right to change or discontinue this product without notice.  
© Semiconductor Components Industries, LLC, 2011  
1
Publication Order Number:  
August, 2011 Rev. P2  
PCS3P623Z05/D  

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