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PCA9601DP PDF预览

PCA9601DP

更新时间: 2024-02-01 00:25:07
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
32页 380K
描述
Dual bidirectional bus buffer

PCA9601DP 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:SOIC包装说明:TSSOP,
针数:8Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.71
系列:PCA9JESD-30 代码:S-PDSO-G8
长度:3 mm逻辑集成电路类型:BUS TRANSCEIVER
湿度敏感等级:1位数:1
功能数量:2端口数量:2
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C输出特性:OPEN-COLLECTOR
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:SQUARE
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.1 mm
最大供电电压 (Vsup):15 V最小供电电压 (Vsup):2.5 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:3 mm
Base Number Matches:1

PCA9601DP 数据手册

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PCA9601  
Dual bidirectional bus buffer  
Rev. 2 — 6 May 2011  
Product data sheet  
1. General description  
The PCA9601 is designed to isolate I2C-bus capacitance, allowing long buses to be  
driven in point-to-point or multipoint applications of up to 4000 pF. The PCA9601 is a  
higher-speed version of the P82B96 and a higher drive version of the PCA9600 that  
allows many more Fast-mode Plus (Fm+) slaves on remote daughter cards in applications  
with temperature range of 0 °C to 85 °C.  
It creates a non-latching, bidirectional, logic interface between a normal I2C-bus and a  
range of other higher capacitance or different voltage bus configurations. It can operate at  
speeds up to at least 1 MHz, and the high drive side is compatible with the Fast-mode  
Plus specifications.  
The PCA9601 features temperature-stabilized logic voltage levels at its SX/SY interface  
making it suitable for interfacing with buses that have non I2C-bus-compliant logic levels  
such as SMBus, PMBus, or with microprocessors that use those same TTL logic levels.  
15 mA drive capability over 0 °C to 85 °C at SX/SY allows driving a 5 V Fm+ bus with  
470 pF loading.  
The separation of the bidirectional I2C-bus signals into unidirectional TX and RX signals  
enables the SDA and SCL signals to be transmitted via balanced transmission lines  
(twisted pairs), or with galvanic isolation using opto or magnetic coupling. The TX and RX  
signals may be connected together to provide a normal bidirectional signal.  
2. Features and benefits  
„ Bidirectional data transfer of I2C-bus signals  
„ 15 mA SX/SY sink capability yields 5 V Fm+ bus rise time with 470 pF loads  
„ Isolates capacitance allowing > 400 pF on SX/SY side and 4000 pF on TX/TY side  
„ 1 MHz operation on up to 20 meters of wire (see AN10658)  
„ Supply voltage range of 2.5 V to 15 V with I2C-bus logic levels on SX/SY side  
independent of supply voltage  
„ Splits I2C-bus signal into pairs of forward/reverse TX/RX, TY/RY signals for interface  
with opto-electrical isolators and similar devices that need unidirectional input and  
output signal paths  
„ Low power supply current  
„ ESD protection exceeds 4500 V HBM per JESD22-A114, and 1400 V CDM per  
JESD22-C101  
„ Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA  
„ Packages offered: SO8 and TSSOP8 (MSOP8)  

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