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PCA9539RBS,118 PDF预览

PCA9539RBS,118

更新时间： 2024-11-09 15:47:35
品牌 Logo 应用领域
恩智浦 - NXP PC外围集成电路
页数 文件大小 规格书
37页 389K
描述
PCA9539; PCA9539R - 16-bit I²C-bus and SMBus low power I/O port with interrupt and reset QFN 24-Pin

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PCA9539RBS,118 技术参数

是否Rohs认证： 符合生命周期：Active
零件包装代码：QFN包装说明：HVQCCN, LCC24,.16SQ,20
针数：24Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：1.16
JESD-30 代码：S-PQCC-N24JESD-609代码：e4
长度：4 mm湿度敏感等级：1
位数：16I/O 线路数量：16
端口数量：2端子数量：24
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：HVQCCN
封装等效代码：LCC24,.16SQ,20封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度（摄氏度）：260
电源：2.5/5 V认证状态：Not Qualified
座面最大高度：1 mm子类别：Parallel IO Port
最大供电电压：5.5 V最小供电电压：2.3 V
标称供电电压：3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：NICKEL PALLADIUM GOLD端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：40宽度：4 mm
uPs/uCs/外围集成电路类型：PARALLEL IO PORT, GENERAL PURPOSEBase Number Matches：1

PCA9539RBS,118 数据手册

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PCA9539; PCA9539R  
16-bit I2C-bus and SMBus low power I/O port with interrupt  
and reset  
Rev. 6 — 6 February 2013  
Product data sheet  
1. General description  
The PCA9539; PCA9539R is a 24-pin CMOS device that provides 16 bits of General  
Purpose parallel Input/Output (GPIO) expansion with interrupt and reset for  
I2C-bus/SMBus applications and was developed to enhance the NXP Semiconductors  
family of I2C-bus I/O expanders. I/O expanders provide a simple solution when additional  
I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.  
The PCA9539; PCA9539R consists of two 8-bit configuration (input or output selection),  
input, output and polarity inversion (active HIGH or active LOW operation) registers. The  
system master can enable the I/Os as either inputs or outputs by writing to the I/O  
configuration bits. The data for each input or output is kept in the corresponding Input or  
Output register. The polarity of the read register can be inverted with the Polarity inversion  
register. All registers can be read by the system master.  
The PCA9539; PCA9539R is identical to the PCA9555 except for the removal of the  
internal I/O pull-up resistor which greatly reduces power consumption when the I/Os are  
held LOW, replacement of A2 with RESET and a different address range.  
The PCA9539; PCA9539R open-drain interrupt output is activated when any input state  
differs from its corresponding input port register state and is used to indicate to the system  
master that an input state has changed.  
The power-on reset sets the registers to their default values and initializes the device state  
machine. In the PCA9539, the RESET pin causes the same reset/default I/O input  
configuration to occur without de-powering the device, holding the registers and I2C-bus  
state machine in their default state until the RESET input is once again HIGH. This input  
requires a pull-up to VDD. In the PCA9539R however, only the device state machine is  
initialized by the RESET pin and the internal general-purpose registers remain  
unchanged. Using the PCA9539R RESET pin will only reset the I2C-bus interface should  
it be stuck LOW to regain access to the I2C-bus. This allows the I/O pins to retain their last  
configured state so that they can keep any lines in their previously defined state and not  
cause system errors while the I2C-bus is being restored.  
Two hardware pins (A0, A1) vary the fixed I2C-bus address and allow up to four devices to  
share the same I2C-bus/SMBus.  
2. Features and benefits  
16-bit I2C-bus GPIO with interrupt and reset  
Operating power supply voltage range of 2.3 V to 5.5 V  
(5.0 V 10 % for PCA9539PW/Q900 AEC-Q100 compliant devices)  
5 V tolerant I/Os  
 
 
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PCA9539RBS,118 替代型号

型号 品牌 替代类型 描述 数据表
PCA9535CHF,118 NXP

完全替代

 PCA9535; PCA9535C - 16-bit I2C-bus and SMBus, low power I/O port with interrupt QFN 24-Pin
PCA9535BS,118 NXP

类似代替

 PCA9535; PCA9535C - 16-bit I2C-bus and SMBus, low power I/O port with interrupt QFN 24-Pin

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