Datasheet > PC8240

PC8240

更新时间： 2024-01-07 02:55:19

品牌	Logo	应用领域
爱特美尔 - ATMEL		/
页数	文件大小	规格书
42页	405K
描述
Integrated Processor Family

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中文翻译

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数据手册

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PC8240 数据手册

Features

• 6.6 SPEC int 95, 5.5 SPECfp95 at 266 MHz (Estimated)

• Superscalar 603e Core

• Integer Unit (IU), Floating-Point Unit (FPU) (User Enabled or Disabled), Load/Store Unit

(LSU), System Register Unit (SRU), and a Branch Processing Unit (BPU)

• 16-Kbyte Instruction Cache

• 16-Kbyte Data Cache

• Lockable L1 Caches - Entire Cache or on a Per-way Basis up to 3 of 4 Ways

• Dynamic Power Management

• High-bandwidth Bus (32/64 bits Data Bus) to DRAM

• Supports 1-Mbyte to 1-Gbyte DRAM Memory

• 32-bit PCI Interface Operating up to 66 MHz

• PCI 2.1-compliant, 5.0V Tolerance

• Fint Max = 200 MHz

• FBus Max = 66 MHz

Integrated

Processor

Family

Description

The PC8240 combines a PowerPC^™603e core microprocessor with a PCI bridge. The

PC8240’s PCI support will allow system designers to rapidly design systems using peripherals

already designed for PCI and the other standard interfaces. The PC8240 also integrates a high-

performance memory controller which supports various types of DRAM and ROM. The PC8240

is the first of a family of products that provides system level support for industry standard inter-

faces with a PowerPC microprocessor core.

PC8240

The peripheral logic integrates a PCI bridge, memory controller, DMA controller, EPIC interrupt

controller, I₂O controller, and a two-wire interface controller. The 603e core is a full-featured,

high-performance processor with floating-point support, memory management, 16-Kbyte

instruction cache, 16-Kbyte data cache, and power management features. The integration

reduces the overall packaging requirements and the number of discrete devices required for an

embedded system.

The PC8240 contains an internal peripheral logic bus that interfaces the 603e core to the

peripheral logic. The core can operate at a variety of frequencies, allowing the designer to trade

off performance for power consumption. The 603e core is clocked from a separate PLL, which

is referenced to the peripheral logic PLL. This allows the microprocessor and the peripheral

logic block to operate at different frequencies, while maintaining a synchronous bus interface.

The interface uses a 64- or 32-bit data bus (depending on memory data bus width) and a 32-bit

address bus along with control signals that enable the interface between the processor and

peripheral logic to be optimized for performance. PCI accesses to the PC8240’s memory space

are passed to the processor bus for snooping purposes when snoop mode is enabled.

The PC8240’s features serve a variety of embedded applications. In this way, the 603e core

and peripheral logic remain general-purpose. The PC8240 can be used as either a PCI host or

an agent controller.

Screening/Quality/Packaging

This product is manufactured in full compliance with:

•

Upscreening based upon Atmel standards

Industrial temperature range

(T_c= -40°C, T_c= +110°C)

(T_c= -40°C, T_c= +125°C): ZD3 suffix

Core power supply:

•

TP suffix

2.5 ± 5 % V (L-Spec for 200 MHz)

TBGA352

Tape Ball Grid Array

•

I/O power supply: 3.0V to 3.6V

352 Tape Ball Grid Array (TBGA)

Rev. 2149A–HIREL–05/02

12 3 4 5 6 7...42

中文翻译

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