5秒后页面跳转
PACE1754-25QLMB PDF预览

PACE1754-25QLMB

更新时间: 2024-11-13 14:44:07
品牌 Logo 应用领域
PYRAMID /
页数 文件大小 规格书
16页 143K
描述
Micro Peripheral IC

PACE1754-25QLMB 技术参数

生命周期:Active包装说明:,
Reach Compliance Code:compliant风险等级:5.65
Is Samacsys:NBase Number Matches:1

PACE1754-25QLMB 数据手册

 浏览型号PACE1754-25QLMB的Datasheet PDF文件第2页浏览型号PACE1754-25QLMB的Datasheet PDF文件第3页浏览型号PACE1754-25QLMB的Datasheet PDF文件第4页浏览型号PACE1754-25QLMB的Datasheet PDF文件第5页浏览型号PACE1754-25QLMB的Datasheet PDF文件第6页浏览型号PACE1754-25QLMB的Datasheet PDF文件第7页 
PACE1754/SOS  
PROCESSOR INTERFACE CIRCUIT (PIC)  
CMOS/SOS SPACE PROCESSOR  
MICROPERIPHERAL  
FEATURES  
Single 5V ± 10% Power Supply  
The PACE1754 (PIC) is a support chip for the  
PACE1750A/AEProcessors. Iteliminatesthe  
SSI/MSI Logic and external system functions  
required in typical 1750A implementations.  
Available in:  
— 68-Lead Quad Pack with optional Gull Wing  
Surface Mount  
Provides a significant savings in part-count and  
power dissipation enhancing reliability and  
overall system speed performance.  
Provides an optimal interface when used with  
the PACE1753 MMU/COMBO in a full 1750A  
implementation.  
Provides the following additional important  
system functions:  
— Programmable READY for memory and I/O  
— Automatic READY during self-test and  
internal I/O instructions  
— 100KHz timer clock output provided  
— Programmable system watchdog—ranges  
from 1 µs to 1 minute  
— Programmable Bus time-out function  
— Memory Parity generation/detection  
— Error detection of unimplemented memory  
and/or I/O space addressing  
— First failing memory address register for  
diagnostics  
— High drive three-state address latches  
— Built-in system test program—automatically  
teststhePACE1750A/AECPUs,PACE1753  
MMU/COMBO,PACE1754PICandsystem  
address lines as well as memory and I/O  
strobes  
— System configuration decoding and buffering  
— Interrupt acknowledge decoder and strobe  
— Start up ROM support per MIL-STD-1750A  
— Memory or I/O READ/WRITE three-state  
strobes with external three-state control for  
DMA applications  
PACE1754 PROCESSOR INTERFACE  
CIRCUIT DESCRIPTION  
ThePACE1754ProcessorInterfaceCircuit(PIC)isasingle  
chipimplementationofmanyspecialsystemfunctionsthat  
areoftenrequiredwhenusingthePACE1750A/AE,asingle  
chipmicroprocessor. ThePICallowsasystemdesignerto  
designahigherperformance,moreeffecientmicroprocessor  
system which uses less power and takes up less board  
space.  
Available with Class S manufacturing,  
screening, and testing.  
SOS insulated substrate technology provides  
absolute latch-up immunity and excellent SEU  
tolerance.  
ThePICprovidesmanyimportantsystemfunctions.These  
functions are governed by respective bit positions in a  
programmableControlRegisterwhichisincorporatedinthe  
PIC. The individual bits of the control register are set to  
selectthevariousfeaturesandaresettoaspecifieddefault  
valueuponReset.  
SOS devices are fully interchangeable with  
application-proven SMD CMOS P1754 devices.  
20, 25 and 30 MHz operation over full Military  
Temperature Range  
Do c um e nt # MICRO-9 REV B  
Re vise d Aug ust 2005  

与PACE1754-25QLMB相关器件

型号 品牌 获取价格 描述 数据表
PACE1754-30CC PYRAMID

获取价格

Microprocessor Circuit, CMOS, PDIP64, 0.050 INCH PITCH, DIP-64
PACE1754-30CMB PYRAMID

获取价格

Microprocessor Circuit, CMOS, CDIP64
PACE1754-30GMB PYRAMID

获取价格

Microprocessor Circuit, CMOS, CDSO64
PACE1754-30QGMB PYRAMID

获取价格

Microprocessor Circuit, CMOS, PQFP68, GULLWING, LCC-68
PACE1754-30QLC PYRAMID

获取价格

Microprocessor Circuit, CMOS, QFP-68
PACE1754-40CC PYRAMID

获取价格

Microprocessor Circuit, CMOS, PDIP64, 0.050 INCH PITCH, DIP-64
PACE1754-40PGC PYRAMID

获取价格

Microprocessor Circuit, CMOS, CPGA68, 0.100 INCH PITCH, PGA-68
PACE1754-40PGMB PYRAMID

获取价格

Microprocessor Circuit, CMOS, CPGA68
PACE1754-40QLC PYRAMID

获取价格

Microprocessor Circuit, CMOS, QFP-68
PACE1757M PYRAMID

获取价格

COMPLETE EMBEDDED CPU SUBSYSTEM