Datasheet > PACE1754-30GMB

PACE1754-30GMB

更新时间： 2024-11-13 14:44:07

品牌	Logo	应用领域
PYRAMID		外围集成电路
页数	文件大小	规格书
16页	143K
描述
Microprocessor Circuit, CMOS, CDSO64

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PACE1754-30GMB 技术参数

生命周期：	Obsolete	零件包装代码：	SOIC
包装说明：	SOP,	针数：	64
Reach Compliance Code：	unknown	HTS代码：	8542.31.00.01
风险等级：	5.31	Is Samacsys：	N
JESD-30 代码：	R-CDSO-G64	长度：	42.2402 mm
端子数量：	64	最高工作温度：	125 °C
最低工作温度：	-55 °C	封装主体材料：	CERAMIC, METAL-SEALED COFIRED
封装代码：	SOP	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	认证状态：	Not Qualified
座面最大高度：	5.207 mm	最大压摆率：	50 mA
最大供电电压：	5.5 V	最小供电电压：	4.5 V
标称供电电压：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	MILITARY
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	宽度：	14.986 mm
uPs/uCs/外围集成电路类型：	MICROPROCESSOR CIRCUIT	Base Number Matches：	1

PACE1754-30GMB 数据手册

PACE1754/SOS

PROCESSOR INTERFACE CIRCUIT (PIC)

CMOS/SOS SPACE PROCESSOR

MICROPERIPHERAL

FEATURES

Single 5V ± 10% Power Supply

The PACE1754 (PIC) is a support chip for the

PACE1750A/AEProcessors. Iteliminatesthe

SSI/MSI Logic and external system functions

required in typical 1750A implementations.

Available in:

— 68-Lead Quad Pack with optional Gull Wing

Surface Mount

Provides a significant savings in part-count and

power dissipation enhancing reliability and

overall system speed performance.

Provides an optimal interface when used with

the PACE1753 MMU/COMBO in a full 1750A

implementation.

Provides the following additional important

system functions:

— Programmable READY for memory and I/O

— Automatic READY during self-test and

internal I/O instructions

— 100KHz timer clock output provided

— Programmable system watchdog—ranges

from 1 µs to 1 minute

— Programmable Bus time-out function

— Memory Parity generation/detection

— Error detection of unimplemented memory

and/or I/O space addressing

— First failing memory address register for

diagnostics

— High drive three-state address latches

— Built-in system test program—automatically

teststhePACE1750A/AECPUs,PACE1753

MMU/COMBO,PACE1754PICandsystem

address lines as well as memory and I/O

strobes

— System configuration decoding and buffering

— Interrupt acknowledge decoder and strobe

— Start up ROM support per MIL-STD-1750A

— Memory or I/O READ/WRITE three-state

strobes with external three-state control for

DMA applications

PACE1754 PROCESSOR INTERFACE

CIRCUIT DESCRIPTION

ThePACE1754ProcessorInterfaceCircuit(PIC)isasingle

chipimplementationofmanyspecialsystemfunctionsthat

areoftenrequiredwhenusingthePACE1750A/AE,asingle

chipmicroprocessor. ThePICallowsasystemdesignerto

designahigherperformance,moreeffecientmicroprocessor

system which uses less power and takes up less board

space.

Available with Class S manufacturing,

screening, and testing.

SOS insulated substrate technology provides

absolute latch-up immunity and excellent SEU

tolerance.

ThePICprovidesmanyimportantsystemfunctions.These

functions are governed by respective bit positions in a

programmableControlRegisterwhichisincorporatedinthe

PIC. The individual bits of the control register are set to

selectthevariousfeaturesandaresettoaspecifieddefault

valueuponReset.

SOS devices are fully interchangeable with

application-proven SMD CMOS P1754 devices.

20, 25 and 30 MHz operation over full Military

Temperature Range

Do c um e nt # MICRO-9 REV B

Re vise d Aug ust 2005

12 3 4 5 6 7...16

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与PACE1754-30GMB相关器件

型号	品牌	获取价格	描述	数据表
PACE1754-30QGMB	PYRAMID	获取价格	Microprocessor Circuit, CMOS, PQFP68, GULLWING, LCC-68
PACE1754-30QLC	PYRAMID	获取价格	Microprocessor Circuit, CMOS, QFP-68
PACE1754-40CC	PYRAMID	获取价格	Microprocessor Circuit, CMOS, PDIP64, 0.050 INCH PITCH, DIP-64
PACE1754-40PGC	PYRAMID	获取价格	Microprocessor Circuit, CMOS, CPGA68, 0.100 INCH PITCH, PGA-68
PACE1754-40PGMB	PYRAMID	获取价格	Microprocessor Circuit, CMOS, CPGA68
PACE1754-40QLC	PYRAMID	获取价格	Microprocessor Circuit, CMOS, QFP-68
PACE1757M	PYRAMID	获取价格	COMPLETE EMBEDDED CPU SUBSYSTEM
PACE1757M-20PGC	PYRAMID	获取价格	Microprocessor, 16-Bit, 20MHz, CMOS, CPGA68, PGA-68
PACE1757M-20PGM	PYRAMID	获取价格	Microprocessor
PACE1757M-20PGMB	PYRAMID	获取价格	Microprocessor, 16-Bit, 20MHz, CMOS, CPGA68, PGA-68

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