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P4C164-12DM PDF预览

P4C164-12DM

更新时间: 2024-11-17 21:08:23
品牌 Logo 应用领域
PYRAMID 静态存储器内存集成电路
页数 文件大小 规格书
8页 80K
描述
Standard SRAM, 8KX8, 12ns, CMOS, CDIP28, 0.300 INCH, CERAMIC, DIP-28

P4C164-12DM 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:DIP
包装说明:DIP, DIP28,.3针数:28
Reach Compliance Code:compliantECCN代码:3A001.A.2.C
HTS代码:8542.32.00.41风险等级:5
最长访问时间:12 nsI/O 类型:COMMON
JESD-30 代码:R-CDIP-T28JESD-609代码:e0
内存密度:65536 bit内存集成电路类型:STANDARD SRAM
内存宽度:8功能数量:1
端子数量:28字数:8192 words
字数代码:8000工作模式:ASYNCHRONOUS
最高工作温度:125 °C最低工作温度:-55 °C
组织:8KX8输出特性:3-STATE
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:DIP
封装等效代码:DIP28,.3封装形状:RECTANGULAR
封装形式:IN-LINE并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not Qualified座面最大高度:5.715 mm
最大待机电流:0.025 A最小待机电流:4.5 V
子类别:SRAMs最大压摆率:0.18 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:TIN LEAD端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

P4C164-12DM 数据手册

 浏览型号P4C164-12DM的Datasheet PDF文件第2页浏览型号P4C164-12DM的Datasheet PDF文件第3页浏览型号P4C164-12DM的Datasheet PDF文件第4页浏览型号P4C164-12DM的Datasheet PDF文件第5页浏览型号P4C164-12DM的Datasheet PDF文件第6页浏览型号P4C164-12DM的Datasheet PDF文件第7页 
P4C164/P4C164L  
ULTRA HIGH SPEED 8K x 8  
STATIC CMOS RAMS  
FEATURES  
Full CMOS, 6T Cell  
Output Enable and Dual Chip Enable Control  
Functions  
High Speed (Equal Access and Cycle Times)  
– 8/10/12/15/20/25 ns (Commercial)  
– 10/12/15/20/25/35 (Industrial)  
Single 5V±10% Power Supply  
Data Retention with 2.0V Supply, 10 µA Typical  
Current (P4C164L Military)  
– 12/15/20/25/35/45 ns (Military)  
Low Power Operation  
– 770mW Active –15  
Common Data I/O  
– 660/743 mW Active – 20  
Fully TTL Compatible Inputs and Outputs  
– 495/575 mW Active – 25, 35, 45  
– 193/220 mW Standby (TTL Input)  
– 5.5mW Standby (CMOS Input) P4C164L (Military)  
Standard Pinout (JEDEC Approved)  
– 28-Pin 300 mil DIP, SOJ  
– 28-Pin 600 mil Ceramic DIP  
– 28-Pin 350 x 550 mil LCC  
– 28-Pin CERPACK  
DESCRIPTION  
The P4C164 and P4C164L are 65,536-bit ultra high-speed  
static RAMs organized as 8K x 8. The CMOS memories  
require no clocks or refreshing and have equal access and  
cycle times. Inputs are fully TTL-compatible. The RAMs  
operate from a single 5V±10% tolerance power supply.  
With battery backup, data integrity is maintained with  
supply voltages down to 2.0V. Current drain is typically 10  
µA from a 2.0V supply.  
Access times as fast as 10 nanoseconds are available,  
permitting greatly enhanced system operating speeds. In  
full standby mode with CMOS inputs, power consumption  
is only 5.5 mW for the P4C164L.  
The P4C164 and P4C164L are available in 28-pin 300 mil  
DIP and SOJ, 28-pin 600 mil ceramic DIP, and 28-pin 350  
x 550 mil LCC packages providing excellent board level  
densities.  
FUNCTIONAL BLOCK DIAGRAM  
PIN CONFIGURATIONS  
NC  
V
CC  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
A0  
A
0
2
WE  
CE  
3
27  
26  
65,536-BIT  
ROW  
A
1
NC  
4
5
6
7
8
9
CE  
A
3
MEMORY  
SELECT  
ARRAY  
2
2
28  
2
A
2
A
3
4
1
25  
24  
23  
22  
21  
20  
19  
18  
A
A
A
12  
12  
A7  
A
3
A
4
A
A
5
11  
10  
11  
10  
A
4
A
5
6
A
5
A
6
7
OE  
I/O1  
OE  
A
6
8
A
9
A
7
A
9
INPUT  
DATA  
COLUMN I/O  
A
7
9
A
8
10  
11  
12  
CE  
CE  
1
1
CONTROL  
A
8
10  
11  
12  
13  
14  
I/O  
I/O  
I/O  
I/O  
I/O  
8
8
7
I/O8  
1
2
I/O  
14 15 16  
1
I/O  
7
I/O  
13  
17  
2
I/O  
I/O  
I/O  
6
5
4
I/O  
3
COLUMN  
SELECT  
GND  
CE1  
CE2  
DIP (P5, D5-2, D5-1), SOJ (J5)
CERPACK (F4) SIMILAR  
TOP VIEW  
LCC (L5)  
TOP VIEW  
WE  
• • • • • •  
A8  
A12  
OE  
Means Quality, Service and Speed  
1Q97  
91  

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