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OR3L225B7BM680-DB PDF预览

OR3L225B7BM680-DB

更新时间: 2024-02-19 05:28:25
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 时钟可编程逻辑
页数 文件大小 规格书
90页 2579K
描述
FPGA, 1444 CLBS, 166000 GATES, 266.4MHz, PBGA680, PLASTIC, BGAM-680

OR3L225B7BM680-DB 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:BGA包装说明:PLASTIC, BGAM-680
针数:680Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.84其他特性:MAXIMUM USABLE GATES=340000
最大时钟频率:266.4 MHzCLB-Max的组合延迟:1.03 ns
JESD-30 代码:S-PBGA-B680JESD-609代码:e0
长度:35 mm湿度敏感等级:3
可配置逻辑块数量:1444等效关口数量:166000
输入次数:442逻辑单元数量:11552
输出次数:442端子数量:680
最高工作温度:70 °C最低工作温度:
组织:1444 CLBS, 166000 GATES封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装等效代码:BGA680,34X34,40
封装形状:SQUARE封装形式:GRID ARRAY
峰值回流温度(摄氏度):NOT SPECIFIED电源:2.5,3.3 V
可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY认证状态:Not Qualified
座面最大高度:2.51 mm子类别:Field Programmable Gate Arrays
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:BALL
端子节距:1.27 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:35 mm
Base Number Matches:1

OR3L225B7BM680-DB 数据手册

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Data Addendum  
March 2002  
ORCA OR3LxxxB Series FPGAs  
Table of Contents  
Contents  
Page  
Contents  
Page  
Introduction................................................................ 1  
Features .................................................................... 1  
System-Level Features.............................................. 4  
Support...................................................................... 5  
Description ................................................................ 5  
FPGA Overview ...................................................... 5  
PLC Logic ............................................................... 5  
PIC Logic ................................................................ 8  
System Features..................................................... 9  
Routing.................................................................... 9  
Configuration........................................................... 9  
Configuration Data Format...................................... 9  
Series 3L I/Os and 5 V Tolerance......................... 10  
Designing with ORCA Series 3T Parts with  
Series 3L in Mind................................................ 10  
Powerup Sequencing for Series 3L Devices......... 10  
ORCA Foundry Development System .................. 11  
Additional Information ........................................... 11  
Timing Characteristics............................................12  
Configuration Timing........................................... 12  
PFU Timing........................................................ 3  
PLC Timing ..................................................... 9  
SLIC Timing .......................................... 19  
PIO Timing...........................................20  
Special Function Blocks Timing.................. 23  
Clock Timing ....................................................... 25  
Description........................................................... 35  
Estimating Power Dissipation................................. 37  
OR3LxxxB............................................................ 37  
Pin Information ....................................................... 38  
Absolute Maximum Ratings.................................... 76  
Recommended Operating Conditions .................... 76  
Electrical Characteristics........................................ 77  
Package Thermal Charcteristics .......................... 78  
ΘJA ............................................................. 78  
ψJC .................................................................. 78  
ΘJC ......................................................78  
ΘJB ...................................................8  
FPGA Mimum uncon Temperare ....9  
PackagCoplanarity ...................................... 80  
PackagParasis............................................ 80  
Paage utlinDiagrams............................. 81  
Terand Definitions..................................... 81  
08-PiSQFP2.............................................. 82  
20-Pin SQFP2............................................ 83  
-Pin PBGA ................................................... 84  
432-Pin EBGA ...................................... 85  
680-Pin PBAM ............................................... 86  
Ordering Iformion ............................................ 87  
2
Lattice Semiconductor  

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