Datasheet > OR3L225B7BM680-DB

OR3L225B7BM680-DB

更新时间： 2024-01-28 11:03:37

品牌	Logo	应用领域
罗彻斯特 - ROCHESTER		时钟可编程逻辑
页数	文件大小	规格书
90页	2579K
描述
FPGA, 1444 CLBS, 166000 GATES, 266.4MHz, PBGA680, PLASTIC, BGAM-680

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OR3L225B7BM680-DB 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	BGA	包装说明：	PLASTIC, BGAM-680
针数：	680	Reach Compliance Code：	not_compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.84	其他特性：	MAXIMUM USABLE GATES=340000
最大时钟频率：	266.4 MHz	CLB-Max的组合延迟：	1.03 ns
JESD-30 代码：	S-PBGA-B680	JESD-609代码：	e0
长度：	35 mm	湿度敏感等级：	3
可配置逻辑块数量：	1444	等效关口数量：	166000
输入次数：	442	逻辑单元数量：	11552
输出次数：	442	端子数量：	680
最高工作温度：	70 °C	最低工作温度：
组织：	1444 CLBS, 166000 GATES	封装主体材料：	PLASTIC/EPOXY
封装代码：	BGA	封装等效代码：	BGA680,34X34,40
封装形状：	SQUARE	封装形式：	GRID ARRAY
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	2.5,3.3 V
可编程逻辑类型：	FIELD PROGRAMMABLE GATE ARRAY	认证状态：	Not Qualified
座面最大高度：	2.51 mm	子类别：	Field Programmable Gate Arrays
最大供电电压：	3.6 V	最小供电电压：	3 V
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	BALL
端子节距：	1.27 mm	端子位置：	BOTTOM
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	35 mm
Base Number Matches：	1

OR3L225B7BM680-DB 数据手册

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Data Addendum

March 2002

ORCA OR3LxxxB Series FPGAs

PLC Logic

Support

Each PFU within a PLC contains eight 4-input (16-bit)

LUTs, eight latches/FFs, and one additional FF that

may be used independently or with arithmetic func-

tions.

■ ORCA Foundry development system support.

■ Supported by industry-standard CAE tools for design

entry, synthesis, simulation, and timing analysis.

The PFU is organized in a twin-quad fashion: two sets

of four LUTs and FFs that can be controlled indepen-

dently. LUTs may also be combined for use in arith-

metic functions using fast-carry chain logic in either

4-bit or 8-bit modes. The carry-out of either mode may

be registered in the ninth FF for pipelining. Each PFU

may also be conﬁgured as a synchronous 32 × 4 sin-

gle- or dual-port RAM or ROM. The FFs (or latches)

may obtain input from LUT outputs or directly from

invertible PFU inputs, or they can be tied high or tied

low. The FFs also have programmable clock polarity,

clock enables, and local set/reset.

Description

FPGA Overview

The ORCA OR3LxxxB FPGAs are a new generation of

SRAM-based FPGAs built on the successful Series 2

and Series 3 FPGA lines, with enhancements and

innovations geared toward today’s high-speed designs

and tomorrow’s systems on a single chip. Designed

from the start to be synthesis friendly and to reduce

place and route times while maintaining the complete

routability of the ORCA Series 2 devices, the

OR3LxxxB Series more than doubles the logic avail-

able in each logic block and incorporates system-level

features that can further reduce logic requirements and

increase system speed. ORCA OR3LxxxB devices

contain many new patented enhancements and are

offered in a variety of packages, speed grades, and

temperature ranges.

The SLIC is connected to PLC routing resources and to

the outputs of the PFU. It contains 3-state, bidirectional

buffers and logic to perform up to a 10-bit AND function

for decoding, or an AND-OR with optional INVERT to

perform PAL-like functions. The 3-state drivers in the

SLIC and their direct connections to the PFU outputs

make fast, true 3-state buses possible within the

FPGA, reducing required routing and allowing for real-

world system performance.

The ORCA OR3LxxxB Series FPGAs consist of three

basic elements: PLCs, programmable input/output

cells (PICs), and system-level features. An array of

PLCs is surrounded by PICs. Each PLC contains a

PFU, a SLIC, local routing resources, and conﬁguration

RAM. Most of the FPGA logic is performed in the PFU

(see Figure 1), but decoders, PAL-like functions, and

3-state buffering can be performed in the SLIC (see

Figure 2). The PICs provide device inputs and outputs

and can be used to register signals and to perform

input demultiplexing, output multiplexing, and other

functions on two output signals (see Figure 3). Some of

the system-level functions include the MPI and the

PCM.

Lattice Semiconductor

1...4 5 678 9 10...90

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与OR3L225B7BM680-DB相关器件

型号	品牌	描述	获取价格	数据表
OR3L225B-7BM680I	LATTICE	Field Programmable Gate Array, 11552-Cell, CMOS, PBGA680	获取价格
OR3L225B7BM680I-DB	LATTICE	Field Programmable Gate Array, 1444 CLBs, 166000 Gates, 266.4MHz, 11552-Cell, CMOS, PBGA68	获取价格
OR3L225B7PS432-DB	LATTICE	Field Programmable Gate Array, 1444 CLBs, 166000 Gates, 266.4MHz, PBGA432, EBGA-432	获取价格
OR3L225B7PS432I-DB	LATTICE	Field Programmable Gate Array, 1444 CLBs, 166000 Gates, 266.4MHz, PBGA432, EBGA-432	获取价格
OR3L225B7PS680-DB	LATTICE	Field Programmable Gate Array, 1444 CLBs, 166000 Gates, 266.4MHz, PBGA680, PLASTIC, BGAM-6	获取价格
OR3L225B7PS680I-DB	LATTICE	Field Programmable Gate Array, 1444 CLBs, 166000 Gates, 266.4MHz, PBGA680, PLASTIC, BGAM-6	获取价格

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