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NLU1GT32MUTCG PDF预览

NLU1GT32MUTCG

更新时间: 2024-11-25 05:54:11
品牌 Logo 应用领域
安森美 - ONSEMI
页数 文件大小 规格书
8页 136K
描述
Single 2-Input OR Gate, TTL Level

NLU1GT32MUTCG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:DFN
包装说明:VSON, SOLCC6,.04,16针数:6
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.73
系列:1GJESD-30 代码:R-PDSO-N6
JESD-609代码:e4长度:1.2 mm
负载电容(CL):50 pF逻辑集成电路类型:OR GATE
最大I(ol):0.002 A湿度敏感等级:1
功能数量:1输入次数:2
端子数量:6最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:VSON封装等效代码:SOLCC6,.04,16
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, VERY THIN PROFILE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:1.8/5 VProp。Delay @ Nom-Sup:26.7 ns
传播延迟(tpd):26.7 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:0.55 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:NO LEAD端子节距:0.4 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:1 mmBase Number Matches:1

NLU1GT32MUTCG 数据手册

 浏览型号NLU1GT32MUTCG的Datasheet PDF文件第2页浏览型号NLU1GT32MUTCG的Datasheet PDF文件第3页浏览型号NLU1GT32MUTCG的Datasheet PDF文件第4页浏览型号NLU1GT32MUTCG的Datasheet PDF文件第5页浏览型号NLU1GT32MUTCG的Datasheet PDF文件第6页浏览型号NLU1GT32MUTCG的Datasheet PDF文件第7页 
NLU1GT32  
Single 2-Input OR Gate,  
TTL Level  
LSTTLCompatible Inputs  
The NLU1GT32 MiniGatet is an advanced CMOS highspeed  
http://onsemi.com  
2input OR gate in ultrasmall footprint.  
The device input is compatible with TTLtype input thresholds and  
the output has a full 5.0 V CMOS level output swing.  
The NLU1GT32 input and output structures provide protection  
when voltages up to 7.0 V are applied, regardless of the supply  
voltage.  
MARKING  
DIAGRAMS  
UDFN6  
MU SUFFIX  
CASE 517AA  
5M  
5M  
5M  
1
1
Features  
High Speed: t = 3.7 ns (Typ) @ V = 5.0 V  
PD  
CC  
ULLGA6  
1.0 x 1.0  
CASE 613AD  
Low Power Dissipation: I = 2 mA (Max) at T = 25°C  
CC  
A
TTLCompatible Input: V = 0.8 V; V = 2.0 V  
IL  
IH  
CMOSCompatible Output:  
V
OH  
> 0.8 V ; V < 0.1 V @ Load  
CC OL CC  
ULLGA6  
1.2 x 1.0  
CASE 613AE  
Power Down Protection Provided on inputs  
Balanced Propagation Delays  
UltraSmall Packages  
1
These are PbFree Devices  
ULLGA6  
1.45 x 1.0  
5M  
CASE 613AF  
1
IN B  
IN A  
GND  
1
2
3
6
5
V
CC  
5
M
= Device Marking  
= Date Code  
NC  
PIN ASSIGNMENT  
1
IN B  
IN A  
GND  
2
3
4
5
6
4
OUT Y  
OUT Y  
NC  
Figure 1. Pinout (Top View)  
V
CC  
FUNCTION TABLE  
IN A  
IN B  
1  
OUT Y  
Input  
Output  
Y
A
B
Figure 2. Logic Symbol  
L
L
H
H
L
H
L
L
H
H
H
H
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
© Semiconductor Components Industries, LLC, 2009  
1
Publication Order Number:  
July, 2009 Rev. 4  
NLU1GT32/D  

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