Datasheet > NLU1GT50_12

NLU1GT50_12

更新时间： 2024-11-26 01:11:27

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
10页	137K
描述
Single Buffer, Non-Inverting, TTL Level

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NLU1GT50_12 数据手册

NLU1GT50

Single Buffer,

Non-Inverting, TTL Level

TTL−Compatible Inputs

The NLU1GT50 MiniGatet is an advanced CMOS high−speed

http://onsemi.com

MARKING

non−inverting buffer in ultra−small footprint.

The device input is compatible with TTL−type input thresholds and

the output has a full 5.0 V CMOS level output swing.

The NLU1GT50 input and output structures provide protection

when voltages up to 7.0 V are applied, regardless of the supply

voltage.

DIAGRAMS

UDFN6

MU SUFFIX

CASE 517AA

Features

• Designed for 1.65 to 5.5 V V Operation

ULLGA6

1.0 x 1.0

CASE 613AD

• High Speed: t = 3.5 ns (Typ) @ V = 5.0 V

• Low Power Dissipation: I = 1 mA (Max) at T = 25°C

• TTL−Compatible Input: V = 0.8 V; V = 2.0 V, V = 5.0 V

• CMOS−Compatible Output:

ULLGA6

1.2 x 1.0

CASE 613AE

> 0.8 V ; V < 0.1 V @ Load

CC OL CC

• Power Down Protection Provided on inputs

• Balanced Propagation Delays

• Ultra−Small Packages

ULLGA6

1.45 x 1.0

CASE 613AF

• These are Pb−Free Devices

IN A

GND

UDFN6

1.0 x 1.0

CASE 517BX

X M

UDFN6

1.45 x 1.0

CASE 517AQ

OUT Y

= Device Marking

= Date Code

Figure 1. Pinout (Top View)

IN A

OUT Y

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

PIN ASSIGNMENT

Figure 2. Logic Symbol

IN A

GND

OUT Y

FUNCTION TABLE

Publication Order Number:

July, 2012 − Rev. 3

NLU1GT50/D

12 3 4 5 6 7...10

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