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NLU1GT126_12 PDF预览

NLU1GT126_12

更新时间: 2024-10-01 11:58:47
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
10页 141K
描述
Non-Inverting 3-State Buffer, TTL Level

NLU1GT126_12 数据手册

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NLU1GT126  
Non-Inverting 3-State  
Buffer, TTL Level  
LSTTLCompatible Inputs  
The NLU1GT126 MiniGatet is an advanced CMOS highspeed  
http://onsemi.com  
MARKING  
noninverting buffer in ultrasmall footprint.  
The NLU1GT126 requires the 3state control input (OE) to be set  
Low to place the output in the high impedance state.  
The device input is compatible with TTLtype input thresholds and  
the output has a full 5.0 V CMOS level output swing.  
The NLU1GT126 input and output structures provide protection  
when voltages up to 7.0 V are applied, regardless of the supply  
voltage.  
DIAGRAMS  
UDFN6  
1.2 x 1.0  
9M  
CASE 517AA  
1
ULLGA6  
1.0 x 1.0  
CASE 613AD  
Features  
9M  
9M  
High Speed: t = 3.8 ns (Typ) @ V = 5.0 V  
PD  
CC  
1
Low Power Dissipation: I = 2 mA (Max) at T = 25°C  
CC  
A
TTLCompatible Input: V = 0.8 V; V = 2.0 V  
IL  
IH  
ULLGA6  
1.2 x 1.0  
CASE 613AE  
CMOSCompatible Output:  
V
OH  
> 0.8 V ; V < 0.1 V @ Load  
CC OL CC  
1
Power Down Protection Provided on inputs  
Balanced Propagation Delays  
UltraSmall Packages  
ULLGA6  
1.45 x 1.0  
CASE 613AF  
9M  
These are PbFree Devices  
1
UDFN6  
1.0 x 1.0  
CASE 517BX  
OE  
IN A  
GND  
1
2
3
6
5
V
CC  
X M  
X M  
1
NC  
UDFN6  
1.45 x 1.0  
CASE 517AQ  
1
4
OUT Y  
9
M
= Device Marking  
= Date Code  
Figure 1. Pinout (Top View)  
OE  
IN A  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
OUT Y  
Figure 2. Logic Symbol  
FUNCTION TABLE  
PIN ASSIGNMENT  
1
2
3
4
5
6
OE  
IN A  
GND  
OUT Y  
NC  
Input  
Output  
Y
A
OE  
L
H
X
H
H
L
L
H
Z
V
CC  
© Semiconductor Components Industries, LLC, 2012  
1
Publication Order Number:  
July, 2012 Rev. 3  
NLU1GT126/D  

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