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NLSX5014_18

更新时间： 2024-11-03 02:52:31
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
14页 172K
描述
4-Bit 100 Mb/s Configurable Dual-Supply Level Translator

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NLSX5014_18 数据手册

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NLSX5014  
4-Bit 100 Mb/s Configurable  
Dual-Supply Level  
Translator  
The NLSX5014 is a 4-bit configurable dual-supply autosensing  
bidirectional level translator that does not require a direction control  
www.onsemi.com  
pin. The I/O V - and I/O V -ports are designed to track two  
CC  
L
different power supply rails, V and V respectively. Both the V  
CC  
L
CC  
MARKING  
DIAGRAMS  
and the V supply rails are configurable from 0.9 V to 4.5 V. This  
L
allows a logic signal on the V side to be translated to either a higher  
L
or a lower logic signal voltage on the V side, and vice-versa.  
UQFN12  
MU SUFFIX  
CASE 523AE  
CC  
AAMG  
The NLSX5014 offers the feature that the values of the V and  
CC  
G
1
V
L
supplies are independent. Design flexibility is maximized  
because V can be set to a value either greater than or less than the  
L
M
G
= Date Code  
= Pb−Free Package  
V
CC  
supply. In contrast, the majority of competitive auto sense  
translators have a restriction that the value of the V supply must be  
L
(Note: Microdot may be in either location)  
equal to less than (V - 0.4) V.  
CC  
The NLSX5014 has high output current capability, which allows the  
14  
translator to drive high capacitive loads such as most high frequency  
SOIC−14  
D SUFFIX  
CASE 751A  
NLSX5014G  
AWLYWW  
14  
EMI filters. Another feature of the NLSX5014 is that each I/O_V and  
Ln  
1
I/O_V  
channel can function as either an input or an output.  
CCn  
1
An Output Enable (EN) input is available to reduce the power  
consumption. The EN pin can be used to disable both I/O ports by  
putting them in 3-state which significantly reduces the supply current  
14  
NLSX  
5014  
ALYWG  
G
TSSOP−14  
DT SUFFIX  
CASE 948G  
from both V and V . The EN signal is referenced to the V supply.  
CC  
L
L
14  
1
Features  
1
• Wide V , V Operating Range: 0.9 V to 4.5 V  
CC  
L
• V and V are independent  
A
=
=
=
=
Assembly Location  
Wafer Lot  
L
CC  
WL, L  
YY, Y  
WW, W  
G or G  
− V may be greater than, equal to, or less than V  
L
CC  
Year  
Work Week  
• High 100 pF Capacitive Drive Capability  
• High−Speed with 140 Mb/s Guaranteed Date Rate  
= Pb−Free Package  
(Note: Microdot may be in either location)  
for V , V > 1.8 V  
CC  
L
• Low Bit−to−Bit Skew  
• Overvoltage Tolerant Enable and I/O Pins  
• Non−preferential Powerup Sequencing  
• Power−Off Protection  
• Small packaging: 1.7 mm x 2.0 mm UQFN12, SOIC14, TSSOP14  
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS  
Compliant  
ORDERING INFORMATION  
†
Device  
Package  
Shipping  
NLSX5014MUTAG  
NLSX5014DR2G  
NLSX5014DTR2G  
UQFN12 3000/Tape & Reel  
(Pb−Free)  
SO−14  
2500/Tape & Reel  
(Pb−Free)  
Typical Applications  
TSSOP14 2500/Tape & Reel  
(Pb−Free)  
• Mobile Phones, PDAs, Other Portable Devices  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
Important Information  
• ESD Protection for All Pins:  
♦ HBM (Human Body Model) > 7000 V  
©
Semiconductor Components Industries, LLC, 2014  
1
Publication Order Number:  
April, 2018 − Rev. 8  
NLSX5014/D  
1234567...14

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