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NLSX5014MUTAG

更新时间： 2024-11-02 05:54:03
品牌 Logo 应用领域
安森美 - ONSEMI 转换器电平转换器
页数 文件大小 规格书
14页 151K
描述
4-Bit 100 Mb/s Configurable Dual-Supply Level Translator

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中文翻译

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NLSX5014MUTAG 数据手册

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NLSX5014  
4-Bit 100 Mb/s Configurable  
Dual-Supply Level  
Translator  
The NLSX5014 is a 4-bit configurable dual-supply autosensing  
bidirectional level translator that does not require a direction control  
http://onsemi.com  
MARKING  
pin. The I/O V - and I/O V -ports are designed to track two  
CC  
L
different power supply rails, V and V respectively. Both the V  
CC  
L
CC  
DIAGRAMS  
and the V supply rails are configurable from 0.9 V to 4.5 V. This  
L
allows a logic signal on the V side to be translated to either a higher  
L
UQFN12  
MU SUFFIX  
CASE 523AE  
AAMG  
or a lower logic signal voltage on the V side, and vice-versa.  
CC  
G
The NLSX5014 offers the feature that the values of the V and  
CC  
1
V
supplies are independent. Design flexibility is maximized  
L
M
G
= Date Code  
= Pb−Free Package  
because V can be set to a value either greater than or less than the  
L
V
CC  
supply. In contrast, the majority of competitive auto sense  
(Note: Microdot may be in either location)  
translators have a restriction that the value of the V supply must be  
L
equal to less than (V - 0.4) V.  
CC  
14  
The NLSX5014 has high output current capability, which allows  
the translator to drive high capacitive loads such as most high  
frequency EMI filters. Another feature of the NLSX5014 is that each  
SOIC−14  
D SUFFIX  
CASE 751A  
NLSX5014G  
AWLYWW  
14  
1
I/O_V and I/O_V  
channel can function as either an input or an  
1
Ln  
CCn  
output.  
An Output Enable (EN) input is available to reduce the power  
consumption. The EN pin can be used to disable both I/O ports by  
putting them in 3-state which significantly reduces the supply current  
from both V and V . The EN signal is referenced to the V supply.  
14  
NLSX  
5014  
ALYWG  
G
TSSOP−14  
DT SUFFIX  
CASE 948G  
14  
1
CC  
L
L
1
Features  
A
WL, L  
YY, Y  
=
=
=
=
Assembly Location  
Wafer Lot  
Year  
• Wide V , V Operating Range: 0.9 V to 4.5 V  
CC  
L
• V and V are independent  
L
CC  
WW, W  
G or G  
Work Week  
− V may be greater than, equal to, or less than V  
L
CC  
= Pb−Free Package  
• High 100 pF Capacitive Drive Capability  
(Note: Microdot may be in either location)  
• High−Speed with 140 Mb/s Guaranteed Date Rate  
for V , V > 1.8 V  
CC  
L
ORDERING INFORMATION  
• Low Bit−to−Bit Skew  
†
• Overvoltage Tolerant Enable and I/O Pins  
• Non−preferential Powerup Sequencing  
• Power−Off Protection  
Device  
Package  
Shipping  
NLSX5014MUTAG  
NLSX5014DR2G  
NLSX5014DTR2G  
UQFN12 3000/Tape & Reel  
(Pb−Free)  
• Small packaging: 1.7 mm x 2.0 mm UQFN12, SOIC14, TSSOP14  
• These are Pb−Free Devices  
SO−14 2500/Tape & Reel  
(Pb−Free)  
TSSOP14 2500/Tape & Reel  
Typical Applications  
• Mobile Phones, PDAs, Other Portable Devices  
(Pb−Free)  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
Important Information  
• ESD Protection for All Pins:  
♦ HBM (Human Body Model) > 7000 V  
©
Semiconductor Components Industries, LLC, 2010  
1
Publication Order Number:  
June, 2010 − Rev. 1  
NLSX5014/D  
1234567...14

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