Datasheet > NL17SZ07DFT2

NL17SZ07DFT2

更新时间： 2024-11-25 21:54:47

品牌	Logo	应用领域
安森美 - ONSEMI		逻辑集成电路光电二极管
页数	文件大小	规格书
6页	141K
描述
Single Non−Inverting Buffer with Open Drain Output

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数据手册

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NL17SZ07DFT2 数据手册

NL17SZ07

Single Non−Inverting Buffer

with Open Drain Output

The NL17SZ07 is a high performance single inverter with open

drain outputs operating from a 1.65 to 5.5 V supply.

The Output stage is open drain with Over Voltage Tolerance. This

allows the NL17SZ07 to be used to interface 5.0 V circuits to circuits

of any voltage between 0 and +7.0 V.

http://onsemi.com

MARKING

DIAGRAM

• Tiny SOT−353 and SOT−553 Packages

• Extremely High Speed: t 2.5 ns (typical) at V = 5 V

• Designed for 1.65 V to 5.5 V V Operation, CMOS Compatible

• Over Voltage Tolerant Inputs V may be Between 0 and 7.0 V for

VX M G

SC−88A / SOT−353 / SC−70

Between 0.5 and 5.4 V

DF SUFFIX

CASE 419A

• TTL Compatible − Interface Capability with 5.0 V TTL Logic with

= 2.7 V to 3.6 V

• LVCMOS Compatible

• 24 mA Output Sink Capability, Pullup may be between 0 and 7.0 V

L7 D G

• Near Zero Static Supply Current Substantially Reduces System

SOT−553

XV5 SUFFIX

CASE 463B

Power Requirements

• Chip Complexity: FET = 20

• Pb−Free Packages are Available

= Date Code

= Assembly Location

= Year

= Work Week

= Pb−Free Package

IN A

GND

(Note: Microdot may be in either location)

OVT

PIN ASSIGNMENT

Function

OUT Y

IN A

GND

Figure 1. Pinout

OUT Y

FUNCTION TABLE

IN A

OUT Y

A Input

Y Output

Figure 2. Logic Symbol

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

Publication Order Number:

August, 2005 − Rev. 5

NL17SZ07/D

12 3 4 5 6

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