SEMICONDUCTOR
NE555BF/BP
TECHNICAL DATA
General Description
W
These devices are monolithic timin circuits capable of producing
accurate time delays or oscillation. In the time delay mode of operation,
the timed interval is controlled by a single external resistor and capacitor
network. In the astable mode of operation, the frequency and duty cycle
may be independently controlled with two external resistors and a single
external capacitor.
D
Q
P
d
T
DIM MILLIMETERS
_
A
A
B
D
d
9.6+0
8
5
_
6.45+
Features
_
+
1.52
0.46
_
+
G
H
L
0.50 MIN
� Timing from Microseconds to Hours
� Astable or Monostable Operaꢀon
� Adjustable Duty Cycle
� TTL - Compaꢀble Output Can Sink or Source Up to 200 mA
� Temperature Stability of 0.005% per °C
� Direct Replacement for Signeꢀcs NE555 Timer
_
3.8+0
_
+
3.3
0
1
4
P
2.54
0.25+0.1/-0.05
7.62
T
W
Q
0 - 15
DIP-8
Applications
� Precision ꢀming
� Pulse generaꢀon
� Sequenꢀal ꢀming
� Time delay generaꢀon
� Pulse width modulaꢀon
� Pulse posiꢀon modulaꢀon
� Missing pulse detector
P
L
D
A
DIM MILLIMETERS
_
8
+
5
A
B1
B2
D
4.85
_
3.94+
_
+
6.02
_
+
0.4
0
G
0.15+0.1/-0.05
_
1.63+
H
Pin Configuration (Top View)
_
L
0.65+
P
1.27
(TOP VIEW)
T
0.20+0.1/-0.05
1
4
SOP-8
TYPICAL APPLICATION DATA
Circuit for astable operaꢀon
Circuit for monostable operaꢀon
Note A: Bypassing the control voltage input to ground with a capacitor may improve operaꢀon. This should be evaluated
for individual applicaꢀons.
Revision No : 0
1/5
2016. 9. 28