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NCV51400MNTXG PDF预览

NCV51400MNTXG

更新时间： 2024-11-24 01:20:03
品牌 Logo 应用领域
安森美 - ONSEMI 光电二极管接口集成电路
页数 文件大小 规格书
7页 168K
描述
Termination Regulator

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中文翻译

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NCV51400MNTXG 技术参数

是否无铅： 不含铅生命周期：Active
包装说明：3 X 3 MM, 0.50 MM PITCH, GREEN, DFN-10Reach Compliance Code：compliant
Factory Lead Time：10 weeks风险等级：5.65
接口集成电路类型：BUS TERMINATOR SUPPORT CIRCUITJESD-30 代码：S-PDSO-N10
JESD-609代码：e3长度：3 mm
湿度敏感等级：1功能数量：1
端子数量：10最高工作温度：125 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：HVSON封装形状：SQUARE
封装形式：SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度（摄氏度）：NOT SPECIFIED
筛选级别：AEC-Q100座面最大高度：1 mm
最大供电电压：5.5 V最小供电电压：2.375 V
标称供电电压：3.3 V表面贴装：YES
温度等级：AUTOMOTIVE端子面层：Tin (Sn)
端子形式：NO LEAD端子节距：0.5 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：3 mmBase Number Matches：1

NCV51400MNTXG 数据手册

 浏览型号NCV51400MNTXG的Datasheet PDF文件第2页浏览型号NCV51400MNTXG的Datasheet PDF文件第3页浏览型号NCV51400MNTXG的Datasheet PDF文件第4页浏览型号NCV51400MNTXG的Datasheet PDF文件第5页浏览型号NCV51400MNTXG的Datasheet PDF文件第6页浏览型号NCV51400MNTXG的Datasheet PDF文件第7页 
NCP51400, NCV51400  
3 Amp VTT Termination  
Regulator DDR1, DDR2,  
DDR3, LPDDR3, DDR4  
The NCP51400 is a source/sink Double Data Rate (DDR)  
termination regulator specifically designed for low input voltage and  
low−noise systems where space is a key consideration.  
www.onsemi.com  
The NCP51400 maintains a fast transient response and only requires  
a minimum output capacitance of 20 mF. The NCP51400 supports  
a remote sensing function and all power requirements for DDR V  
TT  
bus termination. The NCP51400 can also be used in low−power  
chipsets and graphics processor cores that require dynamically  
adjustable output voltages.  
DFN10, 3x3, 0.5P  
CASE 506CL  
The NCP51400 is available in the thermally−efficient DFN10  
Exposed Pad package, and is rated both Green and Pb−free.  
MARKING DIAGRAM  
Features  
• For Automotive Applications  
• Input Voltage Rails: Supports 2.5 V, 3.3 V and 5 V Rails  
51400  
ALYWG  
G
• PV Voltage Range: 1.1 V to 3.5 V  
CC  
• Integrated Power MOSFETs  
• Fast Load−Transient Response  
51400 = Specific Device Code  
A
L
Y
W
G
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= Pb−Free Package  
• P  
− Logic output pin to Monitor V Regulation  
TT  
GOOD  
• EN − Logic input pin for Shutdown mode  
• V − Reference Input Allows for Flexible Input Tracking Either  
RI  
(Note: Microdot may be in either location)  
Directly or Through Resistor Divider  
• Remote Sensing (V  
)
TTS  
• Built−in Soft Start, Under Voltage Lockout and Over Current Limit  
• Thermal Shutdown  
PIN CONNECTION  
+
V
1
2
10  
9
V
P
RI  
CC  
• Small, Low−Profile 10−pin, 3x3 DFN Package  
• NCV51400MWTXG − Wettable Flank Option for Enhanced Optical  
Inspection  
PV  
CC  
GOOD  
V
TT  
GND  
GND  
EN  
3
4
5
8
7
6
• NCV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AEC−Q100  
Qualified and PPAP Capable*  
P
GND  
V
V
RO  
TTS  
Exposed Pad  
• These Devices are Pb−Free and are RoHS Compliant  
Applications  
ORDERING INFORMATION  
• DDR Memory Termination  
• Desktop PC’s, Notebooks, and Workstations  
• Servers and Networking equipment  
• Telecom/Datacom, GSM Base Station  
• Graphics Processor Core Supplies  
• Set Top Boxes, LCD−TV/PDP−TV, Copier/Printers  
• Chipset/RAM Supplies as Low as 0.5 V  
• Active Bus Termination  
†
Device  
Package  
Shipping  
NCP51400MNTXG  
NCV51400MNTXG*  
NCV51400MWTXG*  
DFN10  
(Pb−Free)  
3000 / Tape &  
Reel  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D.  
© Semiconductor Components Industries, LLC, 2015  
1
Publication Order Number:  
June, 2015 − Rev. 2  
NCP51400/D  
1234567

中文翻译

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