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NC7WZ07L6X PDF预览

NC7WZ07L6X

更新时间: 2024-02-19 16:32:38
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
7页 95K
描述
TinyLogic UHS Dual Buffer (Open Drain Outputs)

NC7WZ07L6X 数据手册

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March 1999  
Revised May 2003  
NC7WZ07  
TinyLogic UHS Dual Buffer (Open Drain Outputs)  
General Description  
Features  
The NC7WZ07 is a dual buffer with open drain outputs  
from Fairchild’s Ultra High Speed Series of TinyLogic in  
the space saving SC70 6-lead package. The device is fab-  
ricated with advanced CMOS technology to achieve ultra  
high speed with high output drive while maintaining low  
static power dissipation over a very broad VCC operating  
Space saving SC70 6-lead package  
Ultra small MicroPak leadless package  
Ultra High Speed: tPZL 2.3 ns Typ into 50 pF at 5V VCC  
High IOL Output Drive: +24 mA at 3V VCC  
Broad VCC Operating Range: 1.65V to 5.5V  
range. The device is specified to operate over the 1.65V to  
5.5V VCC range. The inputs and outputs are high imped-  
Matches the performance of LCX when operated at  
3.3V VCC  
ance when VCC is 0V. Inputs tolerate voltages up to 7V  
independent of VCC operating voltage.  
Power down high impedance inputs/outputs  
Overvoltage tolerant inputs facilitate 5V to 3V translation  
Patented noise/EMI reduction circuitry implemented  
Ordering Code:  
Order  
Number  
Package  
Number  
MAA06A  
MAC06A  
Product Code  
Top Mark  
Z07  
Package Description  
Supplied As  
NC7WZ07P6X  
NC7WZ07L6X  
6-Lead SC70, EIAJ SC88, 1.25mm Wide  
6-Lead MicroPak, 1.0mm Wide  
3k Units on Tape and Reel  
5k Units on Tape and Reel  
D3  
Logic Symbol  
Connection Diagrams  
IEEE/IEC  
Pin Assignments for SC70  
(Top View)  
Pin Descriptions  
Pin One Orientation Diagram  
Pin Names  
A1, A2  
Description  
Data Inputs  
Output  
Y1, Y2  
AAA represents Product Code Top Mark - see ordering code  
Function Table  
Note: Orientation of Top Mark determines Pin One location. Read the top  
product code mark left to right, Pin One is the lower left pin (see diagram).  
Y = A  
Input  
Output  
Pad Assignments for MicroPak  
A
L
Y
L
Z
H
H = HIGH Logic Level  
L = LOW Logic Level  
(Top Thru View)  
TinyLogic is a registered trademark of Fairchild Semiconductor Corporation.  
MicroPak is a trademark of Fairchild Semiconductor Corporation.  
© 2003 Fairchild Semiconductor Corporation  
DS500218  
www.fairchildsemi.com  

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