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NC7WZ07P6 PDF预览

NC7WZ07P6

更新时间: 2024-11-24 23:53:23
品牌 Logo 应用领域
其他 - ETC 触发器逻辑集成电路光电二极管PC
页数 文件大小 规格书
6页 71K
描述
LOGIC GATE|DUAL BUFFER|CMOS|TSSOP|6PIN|PLASTIC

NC7WZ07P6 数据手册

 浏览型号NC7WZ07P6的Datasheet PDF文件第2页浏览型号NC7WZ07P6的Datasheet PDF文件第3页浏览型号NC7WZ07P6的Datasheet PDF文件第4页浏览型号NC7WZ07P6的Datasheet PDF文件第5页浏览型号NC7WZ07P6的Datasheet PDF文件第6页 
March 1999  
Revised January 2001  
NC7WZ07  
TinyLogic UHS Dual Buffer (Open Drain Outputs)  
General Description  
Features  
The NC7WZ07 is a dual buffer with open drain outputs  
from Fairchild’s Ultra High Speed Series of TinyLogic in  
the space saving SC70 6-lead package. The device is fab-  
ricated with advanced CMOS technology to achieve ultra  
high speed with high output drive while maintaining low  
static power dissipation over a very broad VCC operating  
Space saving SC70 6-lead package  
Ultra High Speed: tPZL 2.3 ns Typ into 50 pF at 5V VCC  
High IOL Output Drive: +24 mA at 3V VCC  
Broad VCC Operating Range: 1.65V to 5.5V  
Matches the performance of LCX when operated at  
3.3V VCC  
range. The device is specified to operate over the 1.65V to  
5.5V VCC range. The inputs and outputs are high imped-  
Power down high impedance inputs/outputs  
ance when VCC is 0V. Inputs tolerate voltages up to 7V  
independent of VCC operating voltage.  
Overvoltage tolerant inputs facilitate 5V to 3V translation  
Patented noise/EMI reduction circuitry implemented  
Ordering Code:  
Order  
Number  
Package  
Number  
MAA06A  
MAA06A  
Product Code  
Top Mark  
Z07  
Package Description  
Supplied As  
NC7WZ07P6  
NC7WZ07P6X  
6-Lead SC70, EIAJ SC88, 1.25mm Wide  
6-Lead SC70, EIAJ SC88, 1.25mm Wide  
250 Units on Tape and Reel  
3k Units on Tape and Reel  
Z07  
Logic Symbol  
Connection Diagrams  
IEEE/IEC  
(Top View)  
Pin Descriptions  
Pin One Orientation Diagram  
Pin Names  
A1, A2  
Description  
Data Inputs  
Output  
Y1, Y2  
Function Table  
Y = A  
Input  
Output  
A
L
Y
L
Z
AAA represents Product Code Top Mark - see ordering code  
Note: Orientation of Top Mark determines Pin One location. Read the top  
H
product code mark left to right, Pin One is the lower left pin (see diagram).  
H = HIGH Logic Level  
L = LOW Logic Level  
TinyLogic is a trademark of Fairchild Semiconductor Corporation.  
© 2001 Fairchild Semiconductor Corporation  
DS500218  
www.fairchildsemi.com  

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