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NB7HQ14MMNHTBG PDF预览

NB7HQ14MMNHTBG

更新时间: 2024-09-26 05:51:55
品牌 Logo 应用领域
安森美 - ONSEMI 时钟
页数 文件大小 规格书
10页 1261K
描述
2.5V 7GHz / 10Gbps Differential Input to 1.8V / 2.5V 1:4 CML Clock / Data Fanout Buffer

NB7HQ14MMNHTBG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFN
包装说明:HVQCCN,针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.76最大延迟:0.225 ns
接口集成电路类型:PECL TO CML TRANSLATORJESD-30 代码:S-XQCC-N16
长度:3 mm湿度敏感等级:1
位数:1功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C输出锁存器或寄存器:NONE
输出极性:COMPLEMENTARY封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:1 mm
最大供电电压:2.625 V最小供电电压:2.375 V
标称供电电压:2.5 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Nickel/Gold/Palladium (Ni/Au/Pd)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3 mmBase Number Matches:1

NB7HQ14MMNHTBG 数据手册

 浏览型号NB7HQ14MMNHTBG的Datasheet PDF文件第2页浏览型号NB7HQ14MMNHTBG的Datasheet PDF文件第3页浏览型号NB7HQ14MMNHTBG的Datasheet PDF文件第4页浏览型号NB7HQ14MMNHTBG的Datasheet PDF文件第5页浏览型号NB7HQ14MMNHTBG的Datasheet PDF文件第6页浏览型号NB7HQ14MMNHTBG的Datasheet PDF文件第7页 
NB7HQ14M  
2.5V 7GHz / 10Gbps  
Differential Input to 1.8V /  
2.5V 1:4 CML Clock / Data  
Fanout Buffer w/ Selectable  
Input Equalizer  
http://onsemi.com  
MARKING  
DIAGRAM*  
MultiLevel Inputs w/ Internal Termination  
16  
Description  
1
The NB7HQ14M is a high performance differential 1:4 CML fanout  
buffer with a selectable Equalizer receiver. When placed in series with  
a Clock /Data path operating up to 7 GHz or 10 Gb/s, respectively, the  
NB7HQ14M inputs will compensate the degraded signal transmitted  
across a FR4 PCB backplane or cable interconnect and output four  
identical CML copies of the input signal. Therefore, the serial data rate  
is increased by reducing InterSymbol Interference (ISI) caused by  
losses in copper interconnect or long cables. The EQualizer ENable  
pin (EQEN) allows the IN/IN inputs to either flow through or bypass  
the Equalizer section. Control of the Equalizer function is realized by  
setting EQEN; When EQEN is set Low, the IN/IN inputs bypass the  
Equalizer. When EQEN is set High, the IN/IN inputs flow through the  
Equalizer. The default state at startup is LOW. As such, NB7HQ14M  
is ideal for SONET, GigE, Fiber Channel, Backplane and other  
Clock/Data distribution applications.  
1
NB7H  
Q14M  
ALYWG  
G
QFN16  
MN SUFFIX  
CASE 485G  
A
L
Y
W
G
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= PbFree Package  
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
The differential inputs incorporate internal 50 W termination  
resistors that are accessed through the VT pin. This feature allows the  
NB7HQ14M to accept various logic level standards, such as LVPECL,  
CML or LVDS. The outputs have the flexibility of being powered by  
either a 2.5 V or 1.8 V supply. The 1:4 fanout design was optimized  
for low output skew applications.  
SIMPLIFIED BLOCK DIAGRAM  
The NB7HQ14M is a member of the GigaCommfamily of high  
performance clock products.  
EQ  
Features  
Input Data Rate > 10 Gb/s  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 9 of this data sheet.  
Input Clock Frequency > 7 GHz  
150 ps Typical Propagation Delay  
35 ps Typical Rise and Fall Times  
< 15 ps Maximum Output Skew  
< 0.8 ps Maximum RMS Clock Jitter  
< 10 ps pp of Data Dependent Jitter  
Differential CML Outputs, 400 mV PeaktoPeak, Typical  
Selectable Input Equalization  
Operating Range: V = 2.375 V to 2.625 V, V  
= 1.71 V to  
CC  
CCO  
2.625 V  
Internal Input Termination Resistors, 50 W  
40°C to +85°C Ambient Operating Temperature  
These are PbFree Devices  
© Semiconductor Components Industries, LLC, 2009  
1
Publication Order Number:  
May, 2009 Rev. 0  
NB7HQ14M/D  

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