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NB3H60113G PDF预览

NB3H60113G

更新时间: 2024-10-03 01:17:47
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安森美 - ONSEMI /
页数 文件大小 规格书
22页 292K
描述
3.3 V / 2.5 V Programmable OmniClock Generator

NB3H60113G 数据手册

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NB3H60113G  
3.3 V / 2.5 V Programmable  
OmniClock Generator  
with Single Ended (LVCMOS/LVTTL) and  
Differential (LVPECL/LVDS/ HCSL/CML)  
Outputs  
www.onsemi.com  
The NB3H60113G, which is a member of the OmniClock family, is  
a one−time programmable (OTP), low power PLL−based clock  
generator that supports any output frequency from 8 kHz to 200 MHz.  
The device accepts fundamental mode parallel resonant crystal or a  
single ended (LVCMOS/LVTTL) reference clock as input. It  
generates either three single ended (LVCMOS/LVTTL) outputs, or  
one single ended output and one differential  
(LVPECL/LVDS/HCSL/CML) output. The output signals can be  
modulated using the spread spectrum feature of the PLL  
(programmable spread spectrum type, deviation and rate) for  
applications demanding low electromagnetic interference (EMI).  
Using the PLL bypass mode, it is possible to get a copy of the input  
clock on any or all of the outputs. The device can be powered down  
using the Power Down pin (PD#). It is possible to program the internal  
input crystal load capacitance and the output drive current provided by  
the device. The device also has automatic gain control (crystal power  
limiting) circuitry which avoids the device overdriving the external  
crystal.  
WDFN8  
CASE 511AT  
MARKING DIAGRAM  
1
H0MG  
G
H0 = Specific Device Code  
M
G
= Date Code  
= Pb−Free Device  
(Note: Microdot may be in either location)  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 21 of  
this data sheet.  
Features  
Member of the OmniClock Family of Programmable Clock  
Generators  
Operating Power Supply: 3.3 V 10%, 2.5 V 10%  
I/O Standards  
Inputs: LVCMOS/LVTTL, Fundamental Mode  
Power Saving mode through Power Down Pin  
Programmable PLL Bypass Mode  
Programmable Output Inversion  
Crystal  
Outputs: LVCMOS/LVTTL  
Outputs: LVPECL, LVDS, CML and HCSL  
Programming and Evaluation Kit for Field  
Programming and Quick Evaluation  
Temperature Range −40°C to 85°C  
Packaged in 8−Pin WDFN  
3 Programmable Single Ended (LVCMOS/LVTTL)  
Outputs from 8 kHz to 200 MHz  
1 Programmable Differential Clock Output up to  
200 MHz  
These are Pb−Free Devices  
Input Frequency Range  
Crystal: 3 MHz to 50 MHz  
Typical Applications  
Reference Clock: 3 MHz to 200 MHz  
Configurable Spread Spectrum Frequency Modulation  
Parameters (Type, Deviation, Rate)  
Programmable Internal Crystal Load Capacitors  
eBooks and Media Players  
Smart Wearables, Portable Medical and Industrial  
Equipment  
Set Top Boxes, Printers, Digital Cameras and  
Camcorders  
Programmable Output Drive Current for Single Ended  
Outputs  
© Semiconductor Components Industries, LLC, 2016  
1
Publication Order Number:  
January, 2016 − Rev. 2  
NB3H60113G/D  

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