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NB3H73113GxxMNR2G PDF预览

NB3H73113GxxMNR2G

更新时间: 2024-10-03 01:13:19
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安森美 - ONSEMI /
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24页 303K
描述
Programmable OmniClock Generator

NB3H73113GxxMNR2G 数据手册

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NB3H73113G  
3.3 V / 2.5 V Programmable  
OmniClock Generator with  
I2C / SMBus Interface  
The NB3H73113G, which is a member of the OmniClock family, is  
a one−time programmable (OTP), low power PLL−based clock  
generator that supports any output frequency from 8 kHz to 200 MHz.  
The device accepts fundamental mode parallel resonant crystal or a  
single ended (LVCMOS/LVTTL) reference clock as input. It  
generates either three single ended (LVCMOS/LVTTL) outputs, or  
one single ended output and one differential  
(LVPECL/LVDS/HCSL/CML) output. The output signals can be  
modulated using the spread spectrum feature of the PLL  
(programmable spread spectrum type, deviation and rate) for  
applications demanding low electromagnetic interference (EMI).  
Individual output enable pins OE[2:0] are available to enable/disable  
the outputs. Individual output voltage pins VDDO[2:0] are available  
to independently set the output voltage of each output. The device  
www.onsemi.com  
MARKING DIAGRAM  
3H731  
13Gxx  
ALYWG  
G
1
QFN16  
CASE 485AE  
3H73113G = Specific Device Code  
xx  
= Specific Program Code (Default  
‘00’ for Unprogrammed Part)  
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
A
L
Y
W
G
2
supports SMBus / I C interface with SCLK and SDATA signals. Using  
the standard protocol, data in the device registers can be modified to  
support different configurations. Using the PLL bypass mode, it is  
possible to get a copy of the input clock on any or all of the outputs.  
The device can be powered down using the Power Down pin (PD#). It  
is possible to program the internal input crystal load capacitance and  
the output drive current provided by the device. The device also has  
automatic gain control (crystal power limiting) circuitry which avoids  
the device overdriving the external crystal.  
= Pb−Free Package  
(Note: Microdot may be in either location)  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 23 of  
this data sheet.  
Features  
Member of the OmniClock Family of Programmable  
Clock Generators  
Independent Output Voltage Pins  
Programmable Internal Crystal Load Capacitors  
Programmable Output Drive Current for Single Ended  
Outputs  
Operating Power Supply: 3.3 V 10%, 2.5 V 10%  
2
Supports SMBus / I C Interface  
I/O Standards  
Power Saving Mode through Power Down Pin  
Inputs: LVCMOS/LVTTL, Fundamental Mode  
Crystal  
Programmable PLL Bypass Mode  
Programmable Output Inversion  
Outputs: 1.8 V to 3.3 V LVCMOS/LVTTL  
Outputs: LVPECL, LVDS, HCSL and CML  
Programming and Evaluation Kit Available for Field  
Programming and Quick Evaluation  
3 Programmable Single Ended (LVCMOS/LVTTL)  
Outputs from 8 kHz to 200 MHz  
Temperature Range −40°C to 85°C  
Packaged in 16−pin QFN  
These are Pb−Free Devices  
1 Programmable Differential Clock Output up to  
200 MHz  
Typical Applications  
Input Frequency Range  
Crystal: 3 MHz to 50 MHz  
Reference Clock: 3 MHz to 200 MHz  
eBooks and Media Players  
Smart Wearables, Smart Phones, Portable Medical and  
Industrial Equipment  
Configurable Spread Spectrum Frequency Modulation  
Parameters (Type, Deviation, Rate)  
Set Top Boxes, Printers, Digital Cameras and  
Camcorders  
Individual Output Enable Pins  
© Semiconductor Components Industries, LLC, 2017  
1
Publication Order Number:  
March, 2017 − Rev. 0  
NB3H73113G/D  

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