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NAND04GW3C2A PDF预览

NAND04GW3C2A

更新时间: 2024-10-26 03:17:47
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 闪存
页数 文件大小 规格书
51页 504K
描述
4Gbit, 2112 Byte Page, 3V, Multi-level NAND Flash Memory

NAND04GW3C2A 数据手册

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NAND04GA3C2A  
NAND04GW3C2A  
4Gbit, 2112 Byte Page, 3V, Multi-level NAND Flash Memory  
Features  
High density multi-level Cell (MLC) NAND  
Flash memories:  
– Up to 128 Mbit spare area  
– Cost effective solutions for mass storage  
applications  
NAND interface  
TSOP48 12 x 20mm  
– x8 bus width  
– Multiplexed Address/ Data  
Supply voltages  
– V = 2.7 to 3.6V core supply voltage for  
Chip Enable ‘don’t care’  
DD  
Program, Erase and Read operations.  
– for simple interface with microcontroller  
– V  
= 1.7 to 1.95 or 2.7 to 3.6V for I/O  
DDQ  
Data Protection  
buffers.  
– Hardware Program/Erase locked during  
power transitions  
Page size: (2048 + 64 spare) Bytes  
Block size: (256K + 8K spare) Bytes  
Embedded Error Correction Code (ECC)  
– Internal ECC accelerator  
Page Read/Program  
– Random access: 60µs (max)  
– Sequential access: 60ns(min)  
– Page Program Operation time: 800µs (typ)  
– Easy ECC Command Interface  
Data integrity  
– 10,000 Program/Erase cycles (with ECC)  
– 10 years Data Retention  
Cache Read mode  
®
– Internal Cache Register to improve the  
read throughput  
ECOPACK package available  
Development tools  
Fast Block Erase  
– Bad Blocks Management and Wear  
Leveling algorithms  
– Block erase time: 1.5ms (typ)  
Status Register  
– File System OS Native reference software  
– Hardware simulation models  
Electronic Signature  
Serial Number option  
Table 1.  
Product List  
Reference  
Part Number  
Density  
NAND04GA3C2A  
NAND04GW3C2A  
NAND04Gx3C2A  
4 Gbits  
November 2006  
Rev 2  
1/51  
www.st.com  
1

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