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NAND01GW4A3CZA1T PDF预览

NAND01GW4A3CZA1T

更新时间: 2024-11-01 13:56:19
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 内存集成电路
页数 文件大小 规格书
5页 142K
描述
Flash, 64MX16, 12000ns, PBGA63, 8.50 X 15 MM, 1.20 MM HEIGHT, 0.80 MM PITCH, TFBGA-63

NAND01GW4A3CZA1T 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:BGA包装说明:8.50 X 15 MM, 1.20 MM HEIGHT, 0.80 MM PITCH, TFBGA-63
针数:63Reach Compliance Code:compliant
ECCN代码:3A991.B.1.AHTS代码:8542.32.00.51
风险等级:5.09最长访问时间:12000 ns
JESD-30 代码:R-PBGA-B63JESD-609代码:e0
内存密度:1073741824 bit内存集成电路类型:FLASH
内存宽度:16功能数量:1
端子数量:63字数:67108864 words
字数代码:64000000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:64MX16封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装形状:RECTANGULAR
封装形式:GRID ARRAY并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED编程电压:3 V
认证状态:Not Qualified最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:TIN LEAD
端子形式:BALL端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED类型:NAND TYPE
Base Number Matches:1

NAND01GW4A3CZA1T 数据手册

 浏览型号NAND01GW4A3CZA1T的Datasheet PDF文件第2页浏览型号NAND01GW4A3CZA1T的Datasheet PDF文件第3页浏览型号NAND01GW4A3CZA1T的Datasheet PDF文件第4页浏览型号NAND01GW4A3CZA1T的Datasheet PDF文件第5页 
NAND FLASH  
528 Byte, 264 Word Page Family  
128 Mbit, 256 Mbit, 512 Mbit, 1 Gbit (x8/x16)  
1.8V, 3V Supply Flash Memories  
DATA BRIEFING  
FEATURES SUMMARY  
HIGH DENSITY NAND FLASH MEMORIES  
– Up to 1 Gbit memory array  
Figure 1. Packages  
– Up to 32Mbit spare area  
– Cost effective solutions for mass storage ap-  
plications  
NAND INTERFACE  
– x8 or x16 bus width  
TSOP48  
– Multiplexed Address/ Data  
– Pinout compatibility for all densities  
SUPPLY VOLTAGE  
12 x 20 mm  
FBGA  
– 1.8V device: V = 1.65 to 1.95V  
CC  
– 3.0V device: V = 2.7 to 3.6V  
CC  
PAGE SIZE  
VFBGA63 8.5x15x1 mm  
TFBGA63 8.5x15x1.2 mm  
VFBGA63 9x11x1 mm  
– x8 device: (512 + 16 spare) Bytes  
– x16 device: (256 + 8 spare) Words  
BLOCK SIZE  
– x8 device: (16K + 512 spare) Bytes  
– x16 device: (8K + 256 spare) Words  
PAGE READ / PROGRAM  
– Random access: 12µs (max)  
– Sequential access: 50ns (min)  
– Page program time: 200µs (typ)  
COPY BACK PROGRAM MODE  
– Fast page copy without external buffering  
CACHE PROGRAM MODE  
AUTOMATIC PAGE 0 READ AT POWER-UP  
OPTION  
– Boot from NAND support  
– Automatic Memory Download  
SERIAL NUMBER OPTION  
HARDWARE DATA PROTECTION  
– Program/Erase locked during Power transi-  
tions  
DATA INTEGRITY  
– 100,000 Program/Erase cycles  
– 10 years Data Retention  
DEVELOPMENT TOOLS  
– Internal Cache Register to improve the pro-  
gram throughput  
FAST BLOCK ERASE  
– Error Correction Code software and hard-  
ware models  
– Block erase time: 2ms (Typ)  
STATUS REGISTER  
– Bad Blocks Management and Wear Leveling  
algorithms  
ELECTRONIC SIGNATURE  
CHIP ENABLE ‘DON’T CARE’ OPTION  
– Simple interface with microcontroller  
– PC Demo board with simulation software  
– File System OS Native reference software  
– Hardware simulation models  
August 2003  
1/5  
For further information please contact the STMicroelectronics distributor nearest to you.  

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