Datasheet > N01S830HAT22IT

N01S830HAT22IT

更新时间： 2024-02-23 06:34:00

品牌	Logo	应用领域
安森美 - ONSEMI		静态存储器光电二极管内存集成电路
页数	文件大小	规格书
13页	99K
描述
1 Mb Ultra-Low Power Serial SRAM

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

N01S830HAT22IT 技术参数

是否无铅：	不含铅	生命周期：	Active
包装说明：	TSSOP-8	Reach Compliance Code：	compliant
Factory Lead Time：	96 weeks	风险等级：	5.77
JESD-30 代码：	R-PDSO-G8	JESD-609代码：	e3
长度：	4.4 mm	内存密度：	1048576 bit
内存集成电路类型：	STANDARD SRAM	内存宽度：	8
湿度敏感等级：	3	功能数量：	1
端子数量：	8	字数：	131072 words
字数代码：	128000	工作模式：	SYNCHRONOUS
最高工作温度：	85 °C	最低工作温度：	-40 °C
组织：	128KX8	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	并行/串行：	SERIAL
座面最大高度：	1.1 mm	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	2.5 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Tin (Sn)	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	DUAL
宽度：	3 mm	Base Number Matches：	1

N01S830HAT22IT 数据手册

N01S830HA, N01S830BA

Table 3. CONTROL SIGNAL DESCRIPTIONS

Mode

Used

Signal

Name

Description

HOLD

SPI and

DUAL

Hold

A high level is required for normal operation. Once the device is selected and a serial sequence

is started, this input may be taken low to pause serial communication without resetting the serial

sequence. The pin must be brought low while SCK is low for immediate use. If SCK is not low,

the HOLD function will not be invoked until the next SCK high to low transition. The device must

remain selected during this sequence. SO is high-Z during the Hold time and SI and SCK are

inputs are ignored. To resume operations, HOLD must be pulled high while the SCK pin is low.

Lowering the HOLD input at any time will take to SO output to High-Z.

VBAT

SPI and Battery Voltage Provides the battery power connection to retain data in battery backed mode.

DUAL

SIO0 - 1

DUAL

Serial Data

Input / Output

Receives instructions, addresses and data on the rising edge of SCK. Data is transferred out

after the falling edge of SCK. The instruction must be set after power-up to enable the DUAL

access mode.

SIO0 - 3

QUAD

Serial Data

Input / Output

Receives instructions, addresses and data on the rising edge of SCK. Data is transferred out

after the falling edge of SCK. The instruction must be set after power-up to enable the QUAD

access mode.

Basic Operation

The 1 Mb serial SRAM is designed to interface directly

with a standard Serial Peripheral Interface (SPI) common on

many standard micro-controllers in the default state. It may

also interface with other non-SPI ports by programming

discrete I/O lines to operate the device.

The serial SRAM contains an 8-bit instruction register and

is accessed via the SI pin. The CS pin must be low and the

HOLD pin must be high for the entire operation. Data is

sampled on the first rising edge of SCK after CS goes low.

If the clock line is shared, the user can assert the HOLD input

and place the device into a Hold mode. After releasing the

HOLD pin, the operation will resume from the point where

it was held. The Hold operation is only supported in SPI and

DUAL modes.

By programming the device through a command

instruction, the dual and quad access modes may be initiated.

In these modes, multiplexed I/O lines take the place of the

SPI SI and SO pins and along with the CS and SCK control

the device in a SPI-like, two bit (DUAL) and four bit

(QUAD) wide serial manner. Once the device is put into

either the DUAL or QUAD mode, the device will remain

operating in that mode until powered down or the Reset

Mode operation is programmed.

The following table contains the possible instructions and

formats. All instructions, addresses and data are transferred

MSB first and LSB last.

Table 4. INSTRUCTION SET

Instruction

READ

Command

03h

Description

Read data from memory starting at selected address

WRITE

EQIO

02h

Write (program) data to memory starting at selected address

Enable QUAD I/O access

38h

EDIO

3Bh

Enable DUAL I/O access

RSTQIO

RDMR

WRMR

FFh

Reset from QUAD and DUAL to SPI I/O access

Read mode register

05h

01h

Write mode register

www.onsemi.com

1 234 5 6 7...13

下载PDF

与N01S830HAT22IT相关器件

型号	品牌	描述	获取价格	数据表
N0201R	RENESAS	PNP SILICON EPITAXIAL TRANSISTOR	获取价格
N0201R-T1-AT	RENESAS	PNP SILICON EPITAXIAL TRANSISTOR	获取价格
N0201S	RENESAS	NPN SILICON EPITAXIAL TRANSISTOR	获取价格
N0201S-T1-AT	RENESAS	NPN SILICON EPITAXIAL TRANSISTOR	获取价格
N0202R	RENESAS	PNP SILICON EPITAXIAL TRANSISTOR	获取价格
N0202R-T1-AT	RENESAS	PNP SILICON EPITAXIAL TRANSISTOR	获取价格

产品中心

服务支持

精选活动

关于我们

帮助中心

N01S830HAT22IT

N01S830HAT22IT 技术参数

N01S830HAT22IT 数据手册

与N01S830HAT22IT相关器件

与N01S830HAT22IT相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

N01S830HAT22IT

N01S830HAT22IT 技术参数

N01S830HAT22IT 数据手册

与N01S830HAT22IT相关器件

与N01S830HAT22IT相关文章

您还可以找

您在本页遇到什么问题？