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MX29LV400CBXEC-55Q PDF预览

MX29LV400CBXEC-55Q

更新时间: 2024-11-06 03:14:39
品牌 Logo 应用领域
旺宏电子 - Macronix 存储
页数 文件大小 规格书
68页 889K
描述
4M-BIT [512K x 8 / 256K x 16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY

MX29LV400CBXEC-55Q 数据手册

 浏览型号MX29LV400CBXEC-55Q的Datasheet PDF文件第2页浏览型号MX29LV400CBXEC-55Q的Datasheet PDF文件第3页浏览型号MX29LV400CBXEC-55Q的Datasheet PDF文件第4页浏览型号MX29LV400CBXEC-55Q的Datasheet PDF文件第5页浏览型号MX29LV400CBXEC-55Q的Datasheet PDF文件第6页浏览型号MX29LV400CBXEC-55Q的Datasheet PDF文件第7页 
MX29LV400C T/B  
4M-BIT[512Kx8/256Kx16]CMOSSINGLEVOLTAGE  
3VONLYFLASHMEMORY  
FEATURES  
• Extended single - supply voltage range 2.7V to 3.6V  
• 524,288 x 8/262,144 x 16 switchable  
• Singlepowersupplyoperation  
• Ready/Busy# pin (RY/BY#)  
-Providesahardwaremethodofdetectingprogramor  
eraseoperationcompletion  
- 3.0V only operation for read, erase and program  
operation  
Fully compatible with MX29LV400T/B device  
• Fast access time: 55R/70/90ns  
• Sectorprotection  
- Hardware method to disable any combination of  
sectors from program or erase operations  
-Temporarysectorunprotectallowscodechangesin  
previously locked sectors  
• Lowpowerconsumption  
- 30mA maximum active current  
- 0.2uA typical standby current  
• Commandregisterarchitecture  
- Byte/word Programming (9us/11us typical)  
- Sector Erase (Sector structure 16K-Byte x 1,  
8K-Byte x 2, 32K-Byte x1, and 64K-Byte x7)  
• Auto Erase (chip & sector) and Auto Program  
-Automaticallyeraseanycombinationofsectorswith  
Erase Suspend capability  
• CFI (Common Flash Interface) compliant  
- Flash device parameters stored on the device and  
provide the host system to access  
• 100,000minimumerase/programcycles  
• Latch-up protected to 100mA from -1V to VCC+1V  
• Boot Sector Architecture  
- T = Top Boot Sector  
- B = Bottom Boot Sector  
• Package type:  
- Automatically program and verify data at specified  
address  
- 44-pin SOP  
- 48-pin TSOP  
• Erasesuspend/EraseResume  
- 48-ball CSP (6 x 8mm)  
- Suspends sector erase operation to read data from,  
orprogramdatato,any sectorthatisnotbeingerased,  
then resumes the erase  
- 48-ball CSP (4 x 6mm)  
- All Pb-free devices are RoHS Compliant  
• Compatibility with JEDEC standard  
- Pinout and software compatible with single-power  
supply Flash  
• Status Reply  
- Data# Polling & Toggle bit for detection of program  
anderaseoperationcompletion  
• 20 years data retention  
GENERAL DESCRIPTION  
The MX29LV400C T/B is a 4-mega bit Flash memory  
organized as 512K bytes of 8 bits or 256K words of 16  
bits. MXIC's Flash memories offer the most cost-effec-  
tive and reliable read/write non-volatile random access  
memory. The MX29LV400C T/B is packaged in 44-pin  
SOP, 48-pinTSOP and 48-ball CSP. It is designed to be  
reprogrammed and erased in system or in standard  
EPROM programmers.  
TTL level control inputs and fixed power supply levels  
during erase and programming, while maintaining maxi-  
mum EPROM compatibility.  
MXIC Flash technology reliably stores memory contents  
even after 100,000 erase and program cycles. The MXIC  
cell is designed to optimize the erase and programming  
mechanisms. In addition, the combination of advanced  
tunnel oxide processing and low internal electric fields  
for erase and program operations produces reliable cy-  
cling. The MX29LV400C T/B uses a 2.7V~3.6V VCC  
supply to perform the High Reliability Erase and auto  
Program/Erase algorithms.  
The standard MX29LV400C T/B offers access time as  
fast as 55ns, allowing operation of high-speed micropro-  
cessors without wait states. To eliminate bus conten-  
tion, the MX29LV400C T/B has separate chip enable  
(CE#) and output enable (OE#) controls.  
The highest degree of latch-up protection is achieved  
with MXIC's proprietary non-epi process. Latch-up pro-  
tection is proved for stresses up to 100 milliamps on  
address and data pin from -1V to VCC + 1V.  
MXIC's Flash memories augment EPROM functionality  
with in-circuit electrical erasure and programming. The  
MX29LV400CT/B uses a command register to manage  
this functionality. The command register allows for 100%  
P/N:PM1155  
REV. 1.5, APR. 24, 2006  
1

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