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MX29F022B PDF预览

MX29F022B

更新时间: 2024-11-03 04:58:07
品牌 Logo 应用领域
旺宏电子 - Macronix /
页数 文件大小 规格书
46页 596K
描述
2M-BIT[256K x 8]CMOS FLASH MEMORY

MX29F022B 数据手册

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MX29F022/022NT/B  
2M-BIT[256K x 8]CMOS FLASH MEMORY  
FEATURES  
262,144x 8 only  
Fast access time: 55/70/90/120ns  
Low power consumption  
Status Reply  
- Data polling & Toggle bit for detection of program  
and erase cycle completion.  
- 30mA maximum active current  
- 1uA typical standby current@5MHz  
Programming and erasing voltage 5V±10%  
Command register architecture  
- Byte Programming (7us typical)  
Chip protect/unprotect for 5V only system or 5V/12V  
system  
100,000 minimum erase/program cycles  
Latch-up protected to 100mA from -1 to VCC+1V  
Boot Code Sector Architecture  
- T = Top Boot Sector  
- B = Bottom Boot Sector  
Hardware RESET pin  
- Resets internal state machine to read mode  
Low VCC write inhibit is equal to or less than 3.2V  
Package type:  
- Sector Erase (16K-Byte x1, 8K-Byte x 2, 32K-Byte  
x1, and 64K-Byte x 3)  
Auto Erase (chip & sector) and Auto Program  
- Automatically erase any combination of sectors or  
the whole chip with Erase Suspend capability.  
- Automatically programs and verifies data at speci-  
fied address  
- 32-pin PDIP  
Erase Suspend/Erase Resume  
- 32-pin PLCC  
- Suspends an erase operation to read data from, or  
program data to, a sector that is not being erased,  
then resumes the erase operation.  
- 32-pin TSOP (Type 1)  
20 years data retention  
GENERAL DESCRIPTION  
The MX29F022T/B is a 2-mega bit Flash memory  
organized as 256K bytes of 8 bits only. MXIC's Flash  
memories offer the most cost-effective and reliable read/  
write non-volatile random access memory. The  
MX29F022T/B is packaged in 32-pin PDIP, PLCC and  
32-pinTSOP(I). It is designed to be reprogrammed and  
erased in-system or in-standard EPROM programmers.  
MXIC's Flash technology reliably stores memory  
contents even after 100,000 erase and program cycles.  
The MXIC cell is designed to optimize the erase and  
programming mechanisms. In addition, the combina-  
tion of advanced tunnel oxide processing and low  
internal electric fields for erase and programming  
operations produces reliable cycling. The MX29F022T/  
B uses a 5.0V ± 10% VCC supply to perform the High  
Reliability Erase and auto Program/Erase algorithms.  
The standard MX29F022T/B offers access time as fast  
as 55ns, allowing operation of high-speed microproces-  
sors without wait states. To eliminate bus contention,  
the MX29F022T/B has separate chip enable (CE) and  
output enable (OE) controls.  
The highest degree of latch-up protection is achieved  
with MXIC's proprietary non-epi process. Latch-up  
protection is proved for stresses up to 100 milliamps on  
address and data pin from -1V to VCC + 1V.  
MXIC's Flash memories augment EPROM functionality  
with in-circuit electrical erasure and programming. The  
MX29F022T/B uses a command register to manage this  
functionality. The command register allows for 100%  
TTL level control inputs and fixed power supply levels  
during erase and programming, while maintaining  
maximum EPROM compatibility.  
P/N:PM0556  
REV. 1.3, NOV. 11, 2002  
1

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