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MX25L512ZUI-12G PDF预览

MX25L512ZUI-12G

更新时间: 2024-11-06 05:51:39
品牌 Logo 应用领域
旺宏电子 - Macronix 闪存
页数 文件大小 规格书
39页 1862K
描述
512K-BIT [x 1] CMOS SERIAL FLASH

MX25L512ZUI-12G 数据手册

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MX25L512  
512K-BIT [x 1] CMOS SERIAL FLASH  
FEATURES  
GENERAL  
• Serial Peripheral Interface (SPI) compatible -- Mode 0 and Mode 3  
• 524,288 x 1 bit structure  
• 16 Equal Sectors with 4K byte each  
- Any Sector can be erased individually  
• Single Power Supply Operation  
- 2.7 to 3.6 volt for read, erase, and program operations  
• Latch-up protected to 100mA from -1V to Vcc +1V  
PERFORMANCE  
• High Performance  
- Fast access time: 85MHz serial clock (15pF + 1TTL Load) and 66MHz serial clock (30pF + 1TTL Load)  
- Fast program time: 1.4ms(typ.) and 5ms(max.)/page (256-byte per page)  
- Fast erase time: 60ms(typ.) and 120ms(max.)/sector (4K-byte per sector) ; 1s(typ.) and 2s(max.)/chip(512Kb)  
• Low Power Consumption  
- Low active read current: 12mA(max.) at 85MHz, 8mA(max.) at 66MHz and 4mA(max.) at 33MHz  
- Low active programming current: 15mA (max.)  
- Low active erase current: 15mA (max.)  
- Low standby current: 10uA (max.)  
- Deep power-down mode 1uA (typical)  
• Minimum 100,000 erase/program cycles  
SOFTWARE FEATURES  
• Input Data Format  
- 1-byte Command code  
• Block Lock protection  
- The BP0~BP1 status bit defines the size of the area to be software protected against Program and Erase in-  
structions.  
• Auto Erase and Auto Program Algorithm  
Automatically erases and verifies data at selected sector  
-
-
Automatically programs and verifies data at selected page by an internal algorithm that automatically times the  
program pulse widths (Any page to be programed should have page in the erased state first)  
Status Register Feature  
Electronic Identification  
JEDEC 2-byte Device ID  
-
- RES command, 1-byte Device ID  
HARDWARE FEATURES  
SCLK Input  
Serial clock input  
-
P/N: PM1214  
REV. 1.6, FEB. 17, 2009  
1

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