Datasheet > MX25L51245J

MX25L51245J

更新时间： 2024-04-09 18:59:36

品牌	Logo	应用领域
旺宏电子 - Macronix		/
页数	文件大小	规格书
109页	1397K
描述
DTR, QPI, Suspend/Resume, Advanced Protection, H/W Reset

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MX25L51245J 数据手册

MX25L51245J

2. GENERAL DESCRIPTION

MX25L51245J is 512Mb bits Serial NOR Flash memory, which is conﬁgured as 67,108,864 x 8 internally. When

it is in two or four I/O mode, the structure becomes 268,435,456 bits x 2 or 134,217,728 bits x 4. MX25L51245J

features a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus while it is in

single I/O mode. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO).

Serial access to the device is enabled by CS# input.

When it is in two I/O read mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits

input and data output. When it is in four I/O read mode, the SI pin, SO pin, WP# and RESET# pin (of the 8-pin

package) become SIO0 pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data output.

The MX25L51245J MXSMIO^(Serial Multi I/O) provides sequential read operation on whole chip.

After program/erase command is issued, auto program/erase algorithms which program/erase and verify the

speciﬁed page or sector/block locations will be executed. Program command is executed on byte basis, or page (256

bytes) basis, or word basis for erase command is executed on 4K-byte sector, 32K-byte block, or 64K-byte block,

or whole chip basis.

To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read

command can be issued to detect completion status of a program or erase operation via WIP bit.

Advanced security features enhance the protection and security functions, please refer to the security features

section for more details.

When the device is not in operation and CS# is high, it will remain in standby mode.

The MX25L51245J utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after

100,000 program and erase cycles.

Table 1. Read performance Comparison

Numbers

of Dummy

Cycles

Dual Output Quad Output

Dual IO

Fast Read

(MHz)

Quad IO

Fast Read

(MHz)

Quad I/O DT

Read

Fast Read

(MHz)

Fast Read

(MHz)

Fast Read

(MHz)

80*

70*

54*

120*/133R

104/114R

84/95R

104/114R

70/80R

84/100R

Notes:

1. * Default Status.

2. R mean VCC range = 3.0V-3.6V.

P/N: PM2988

Macronix Proprietary

Rev. 1.1, April 06, 2023

1...3 4 567 8 9...109

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