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MX25L3205MC-20G PDF预览

MX25L3205MC-20G

更新时间: 2024-11-21 03:04:15
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旺宏电子 - Macronix /
页数 文件大小 规格书
45页 482K
描述
32M-BIT [x 1] CMOS SERIAL eLiteFlashTM MEMORY

MX25L3205MC-20G 数据手册

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MX25L3205  
Macronix NBitTM Memory Family  
32M-BIT [x 1] CMOS SERIAL eLiteFlashTM MEMORY  
FEATURES  
GENERAL  
- Automatically erases and verifies data at selected  
• Serial Peripheral Interface (SPI) compatible -- Mode 0  
and Mode 3  
sector  
- Automatically programs and verifies data at selected  
page by an internal algorithm that automatically times  
the program pulse widths (Any page to be programed  
should have page in the erased state first)  
Status Register Feature  
• 33,554,432 x 1 bit structure  
• 64 Equal Sectors with 64K byte each  
- Any sector can be erased  
• Single Power Supply Operation  
- 2.7 to 3.6 volt for read, erase, and program operations  
• Latch-up protected to 100mA from -1V to Vcc +1V  
• Low Vcc write inhibit is from 1.5V to 2.5V  
Electronic Identification  
- JEDEC 2-byte Device ID  
- RES command, 1-byte Device ID  
- REMS command, ADD=00H will output the  
manufacturer's ID first and ADD=01H will output device  
ID first  
PERFORMANCE  
• High Performance  
- Fast access time: 50MHz serial clock (30pF + 1TTL  
Load)  
Additional 4Kb sector independent from main memory  
for parameter storage to eliminate EEPROM from  
system  
- Fast program time: 3ms/page (typical, 256-byte per  
page)  
- Fast erase time: 1s/sector (typical, 64K-byte per  
sector) and 64s/chip (typical)  
HARDWAREFEATURES  
SCLK Input  
- Acceleration mode:  
- Serial clock input  
• SI Input  
- Program time: 2.4ms/page (typical)  
- Erase time: 0.8s/sector (typical) and 51s/chip  
(typical)  
- Serial Data Input  
• SO/PO7  
- Serial Data Output or Parallel mode Data output/input  
• WP#/ACC Pin  
• Low Power Consumption  
- Low active read current: 30mA (max.) at 50MHz  
- Low active programming current: 30mA (max.)  
- Low active erase current: 38mA (max.)  
- Low standby current: 50uA (max.)  
-Deeppower-downmode1uA(typical)  
- Hardware write protection and Program/erase accel-  
eration  
• HOLD# pin  
- pause the chip without diselecting the chip (not for  
paralled mode, please connect HOLD# pin toVCC dur-  
ing parallel mode)  
• Minimum 10K erase/program cycle for array  
• Minimum 100K erase/program cycle for additional 4Kb  
• PO0~PO6  
SOFTWAREFEATURES  
- for parallel mode data output/input  
PACKAGE  
• Input Data Format  
- 1-byte Command code  
- 16-pin SOP (300mil)  
• Auto Erase and Auto Program Algorithm  
P/N:PM1169  
REV. 1.0, JUL. 15, 2005  
1

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