Datasheet > MTD64

MTD64

更新时间： 2024-11-02 03:48:07

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		/
页数	文件大小	规格书
8页	108K
描述
Low Voltage 22-Bit Register with 3.6V Tolerant Inputs and Outputs

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数据手册

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MTD64 数据手册

February 1999

Revised January 2005

74VCX16722

Low Voltage 22-Bit Register

with 3.6V Tolerant Inputs and Outputs

General Description

Features

■ 1.65V–3.6V V_CCsupply operation

The VCX16722 low voltage 22-bit register contains twenty-

two non-inverting D-type flip-flops with 3-STATE outputs

and is intended for bus oriented applications. The design

has been optimized for use with JEDEC compliant 200 pin

DIMM modules.

■ 3.6V tolerant inputs and outputs

■ t_PD(CLK to O_n)

3.6ns max for 3.0V to 3.6V V_CC

4.6ns max for 2.3V to 2.7V V_CC

9.2ns max for 1.65V to 1.95V V_CC

The 74VCX16722 is designed for low voltage (1.65V to

3.6V) V_CCapplications with I/O capability up to 3.6V.

■ Power-down high impedance inputs and outputs

■ Supports live insertion/withdrawal (Note 1)

■ Meets JEDEC registered module specifications

The 74VCX16722 is fabricated with an advanced CMOS

technology to achieve high speed operation while maintain-

ing low CMOS power dissipation.

■ Static Drive (I_OH/I_OL

)

±24mA @ 3.0V

±18mA @ 2.3V

±6mA @ 1.65V

■ Latchup performance exceeds 300 mA

■ ESD performance:

Human body model > 2000V

Machine model >200V

Note 1: To ensure the high-impedance state during power up or power

down, OE should be tied to V_CCthrough a pull-up resistor; the minimum

value of the resistor is determined by the current sourcing capability of the

driver.

Ordering Code:

Order Number Package Number

Package Description

74VCX16722MTD

MTD64

64-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

DS500192

www.fairchildsemi.com

12 3 4 5 6 7 8

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